Rockbox Technical Forums

Rockbox Development => Starting Development and Compiling => Topic started by: vitt13 on November 30, 2021, 03:39:51 PM

Title: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on November 30, 2021, 03:39:51 PM
I tried to use Ingenic MIPS GCC 5.2.0 Toolchain but I gave up with non resolved many of "relocation truncated to fit: R_MIPS_GOT16 against ..." errors. It looked like bunutils problem.
Then I searched anything newer and found Ingenic MIPS Toolchain on FTP.
Direct link: ftp://ftp.ingenic.cn/Ingenic-MIPS-Toolchain/releases/ingenic-mips-toolchain-r5.0.4/
latest has date stump Oct 13, 2021
Mirror https://www.mediafire.com/folder/7x0zksrlh8d3r/Ingenic_MIPS_Toolchain
So I tried to use Ingenic MIPS GCC 7.2.0 Toolchain (mips-linux-gnu-ingenic-gcc7.2.0-glibc2.29-fp32-r5.0.4.tar.bz2) to compile m3k native port. It supports "-march=xburst" flag BTW
I had few problems with compiling but all has been resolved.
First is changing to OUTPUT_FORMAT("elf32-tradlittlemips") in *.lds or removing that string at all.
Second is LD from that GCC 7.2.0 does not accept inlined function in header. It leads to errors at linking stage.
Third is again "relocation truncated to fit: R_MIPS_GOT16 against ..." caused by "-lgcc" flags in app/plugins/plugins.make and libs/rbcodec/codecs/codecs.make
some codecs build failed so I just changed "-lgcc" in link command to
mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a (for two particular compiling failed situation)
and
mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/soft-float/libgcc.a (for other files)
for added $(LDGCC720)

Code: [Select]
diff -ruN rockbox/apps/plugins/plugin.lds rockbox_/apps/plugins/plugin.lds
--- rockbox/apps/plugins/plugin.lds 2021-11-30 23:15:20.509125218 +0300
+++ rockbox_/apps/plugins/plugin.lds 2021-11-30 20:54:27.453792365 +0300
@@ -7,7 +7,7 @@
 #elif defined(CPU_ARM)
 OUTPUT_FORMAT(elf32-littlearm)
 #elif defined(CPU_MIPS)
-OUTPUT_FORMAT(elf32-littlemips)
+//OUTPUT_FORMAT("elf32-tradlittlemips")
 #else
 /* We can have an #error here we don't use this file when build sims! */
 #error Unknown CPU architecture

Code: [Select]
diff -ruN rockbox/apps/plugins/plugins.make rockbox_/apps/plugins/plugins.make
--- rockbox/apps/plugins/plugins.make 2021-11-30 23:15:20.509125218 +0300
+++ rockbox_/apps/plugins/plugins.make 2021-11-30 22:22:04.738824749 +0300
@@ -151,7 +151,7 @@
  $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o $(BUILDDIR)/$*.elf \
  $(filter %.o, $^) \
  $(filter %.a, $+) \
- -lgcc $(PLUGINLDFLAGS)
+ $(LDGCC720) $(PLUGINLDFLAGS)
  $(SILENT)$(call objcopy,$(BUILDDIR)/$*.elf,$@)
 
 $(BUILDDIR)/apps/plugins/%.lua: $(ROOTDIR)/apps/plugins/%.lua
@@ -161,4 +161,4 @@
  $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o /dev/null \
  $(filter %.o, $^) \
  $(filter %.a, $+) \
- -lgcc $(OVERLAYLDFLAGS)
+ $(LDGCC720) $(OVERLAYLDFLAGS)

Code: [Select]
diff -ruN rockbox/lib/rbcodec/codecs/codecs.make rockbox_/lib/rbcodec/codecs/codecs.make
--- rockbox/lib/rbcodec/codecs/codecs.make 2021-11-30 23:15:21.861145243 +0300
+++ rockbox_/lib/rbcodec/codecs/codecs.make 2021-11-30 21:57:13.469772087 +0300
@@ -212,11 +212,11 @@
  $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*-pre.elf \
  $(filter %.o, $^) \
  $(filter-out $(CODECLIB),$(filter %.a, $+)) $(CODECLIB) \
- -lgcc $(subst .map,-pre.map,$(CODECLDFLAGS))
+ $(LDGCC720) $(subst .map,-pre.map,$(CODECLDFLAGS))
 
 $(CODECDIR)/%.codec: $(CODECDIR)/%.o
  $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*.elf \
  $(filter %.o, $^) \
  $(filter %.a, $+) \
- -lgcc $(CODECLDFLAGS)
+ $(LDGCC720) $(CODECLDFLAGS)
  $(SILENT)$(call objcopy,$(CODECDIR)/$*.elf,$@)

that nasty hack, I shamed
Code: [Select]
diff -ruN rockbox/apps/debug_menu.c rockbox_/apps/debug_menu.c
--- rockbox/apps/debug_menu.c 2021-11-30 23:15:20.099119145 +0300
+++ rockbox_/apps/debug_menu.c 2021-11-29 22:48:18.561253304 +0300
@@ -188,7 +188,7 @@
     return simplelist_show_list(&info);
 }
 
-#ifdef __linux__
+#ifdef __linux__1
 #include "cpuinfo-linux.h"
 
 #define MAX_STATES 16
@@ -2588,7 +2588,7 @@
         { "Catch mem accesses", dbg_set_memory_guard },
 #endif
         { "View OS stacks", dbg_os },
-#ifdef __linux__
+#ifdef __linux__1
         { "View CPU stats", dbg_cpuinfo },
 #endif
 #if (CONFIG_BATTERY_MEASURE != 0) && !defined(SIMULATOR)

Code: [Select]
diff -ruN rockbox/firmware/drivers/i2c-async.c rockbox_/firmware/drivers/i2c-async.c
--- rockbox/firmware/drivers/i2c-async.c 2021-11-30 23:15:21.026132875 +0300
+++ rockbox_/firmware/drivers/i2c-async.c 2021-11-30 20:01:46.994213172 +0300
@@ -396,3 +396,30 @@
 
     return desc[1].arg;
 }
+
+int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)
+{
+    return i2c_reg_write(bus, addr, reg, 1, &val);
+}
+
+int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)
+{
+    uint8_t v;
+    int i = i2c_reg_read(bus, addr, reg, 1, &v);
+    if(i == I2C_STATUS_OK)
+        return v;
+    else
+        return -1;
+}
+
+int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,
+                           int bit, int value, uint8_t* val)
+{
+    uint8_t clr = 0, set = 0;
+    if(value)
+        set = 1 << bit;
+    else
+        clr = 1 << bit;
+
+    return i2c_reg_modify1(bus, addr, reg, clr, set, val);
+}

Code: [Select]
diff -ruN rockbox/firmware/export/i2c-async.h rockbox_/firmware/export/i2c-async.h
--- rockbox/firmware/export/i2c-async.h 2021-11-30 23:15:21.085133749 +0300
+++ rockbox_/firmware/export/i2c-async.h 2021-11-30 20:01:37.124067627 +0300
@@ -247,35 +247,15 @@
                            uint8_t clr, uint8_t set, uint8_t* val);
 
 /* Variant to write a single 8-bit value to a register */
-inline int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)
-{
-    return i2c_reg_write(bus, addr, reg, 1, &val);
-}
+extern int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val);
 
 /* Variant to read an 8-bit value from a register; returns the value
  * directly, or returns -1 on any error. */
-inline int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)
-{
-    uint8_t v;
-    int i = i2c_reg_read(bus, addr, reg, 1, &v);
-    if(i == I2C_STATUS_OK)
-        return v;
-    else
-        return -1;
-}
+extern int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg);
 
 /* Variant to set or clear one bit in an 8-bit register */
-inline int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,
-                           int bit, int value, uint8_t* val)
-{
-    uint8_t clr = 0, set = 0;
-    if(value)
-        set = 1 << bit;
-    else
-        clr = 1 << bit;
-
-    return i2c_reg_modify1(bus, addr, reg, clr, set, val);
-}
+extern int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,
+                           int bit, int value, uint8_t* val);
 
 /* Internal API */
 

Code: [Select]
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/app.lds rockbox_/firmware/target/mips/ingenic_x1000/app.lds
--- rockbox/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 23:15:21.417138667 +0300
+++ rockbox_/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 20:38:02.948403179 +0300
@@ -1,7 +1,7 @@
 #include "config.h"
 #include "cpu.h"
 
-OUTPUT_FORMAT("elf32-littlemips")
+//OUTPUT_FORMAT("elf32-tradlittlemips")
 OUTPUT_ARCH(MIPS)
 ENTRY(_start)
 STARTUP(target/mips/ingenic_x1000/crt0.o)

Code: [Select]
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c
--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 23:15:21.418138682 +0300
+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 19:37:40.740889896 +0300
@@ -340,6 +340,17 @@
     jz_writef(CPM_CCR, CE_CPU(0), CE_AHB0(0), CE_AHB2(0));
 }
 
+uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)
+{
+    return (infreq + (outfreq - 1)) / outfreq;
+}
+
+uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)
+{
+    uint32_t div = clk_calc_div(infreq, outfreq);
+    return __builtin_clz(div) ^ 31;
+}
+
 void clk_set_ddr(x1000_clk_t src, uint32_t div)
 {
     /* Write new configuration */

Code: [Select]
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h
--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 23:15:21.418138682 +0300
+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 19:38:01.519196158 +0300
@@ -80,16 +80,9 @@
 extern void clk_set_ddr(x1000_clk_t src, uint32_t div);
 
 /* Returns the smallest n such that infreq/n <= outfreq */
-inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)
-{
-    return (infreq + (outfreq - 1)) / outfreq;
-}
+extern uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq);
 
 /* Returns the smallest n such that (infreq >> n) <= outfreq */
-inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)
-{
-    uint32_t div = clk_calc_div(infreq, outfreq);
-    return __builtin_clz(div) ^ 31;
-}
+extern uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq);
 
 #endif /* __CLK_X1000_H__ */

Code: [Select]
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/spl.lds rockbox_/firmware/target/mips/ingenic_x1000/spl.lds
--- rockbox/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 23:15:21.424138771 +0300
+++ rockbox_/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 20:38:26.213745184 +0300
@@ -1,7 +1,7 @@
 #include "config.h"
 #include "cpu.h"
 
-OUTPUT_FORMAT("elf32-littlemips")
+//OUTPUT_FORMAT("elf32-tradlittlemips")
 OUTPUT_ARCH(MIPS)
 ENTRY(_spl_start)
 STARTUP(target/mips/ingenic_x1000/spl-start.o)

Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: amachronic on November 30, 2021, 07:34:55 PM
Second is LD from that GCC 7.2.0 does not accept inlined function in header. It leads to errors at linking stage.
Yeah, that's my fault. I'll fix it. In C++ 'inline' alone is enough to make the compiler happy but apparently not in C. I guess GCC 4.9 is just more permissive.

The libgcc and linking issues you ran into are probably due to using a Linux toolchain. I'm by no means an expert on setting up cross compilers, but using a 'hosted' compiler to build freestanding code can lead to problems unless you're very careful with the flags you use.

FWIW, the only use of any vendor toolchain would be access to the MXU ISA (Ingenic's SIMD instruction set) and even then, we'd still need optimized assembler routines for decoding, mixing, etc. in order to get any benefit out of it. It's a large undertaking.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on December 12, 2021, 12:43:48 PM
I'm confused with *.rock and *.codec compiling. Output *.rock and *.codec files are not ELF (I compare it with daily builds binaries).
That is why any attempt to run any app/game/plugin gives panic
Code: [Select]
*PANIC*
Exception occurred: Coprocessor Unusable [0xf4fffdb1] at 0x83e027ac (stack at 0x80002838)
Even with recommended GCC 4.9.2 MIPS toolchain compiled with rockboxdev.sh
Can anybody provides me for reference configure command, Makefile and make log for M3K target?

Here is mine, make log with Rockbox's toolchain GCC 4.9.2
https://privatebin.net/?8788ffeb2d7f6580#A67RVAcnSafvQvGGe8ZGHR1bkjutwa4Fef2Zkzat963g
make log https://www.mediafire.com/file/1p0yzx6munwlwk4/make_log.zip/file
and output files "battery_bench.*" https://www.mediafire.com/file/a1xdlyghfbk53va/output_files.zip/file
for example, is it correct command from make log to make *.rock file? Or something goes wrong?
Code: [Select]
/usr/local/bin/mipsel-elf-objcopy  -O binary /home/fix/rockbox/rockbox/build/apps/plugins/battery_bench.elf /home/fix/rockbox/rockbox/build/apps/plugins/battery_bench.rock
---
Edit: I compared with wrong directory. Header *.rock files from daily build and compiled by me is the same. Anyway something else caused *PANIC*.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: amachronic on December 13, 2021, 07:06:42 AM
Coprocessor unusable probably means it's trying to use the FPU. The Rockbox kernel isn't floating point aware and afaik the FPU is disabled. There's no reason it couldn't be enabled but the effort outweighs the benefits, since nearly everything in Rockbox is integer-only.

Try adding -msoft-float to your CFLAGS.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on December 13, 2021, 03:08:27 PM
Try adding -msoft-float to your CFLAGS.
Thanks. I previously removed that flag for Ingenic TC (toolchain) GCC7.2.0, so with that flag it leads to
Code: [Select]
/home/users/ylli/ingenic_toolchain/project/src/gcc-7-2017.11/libgcc/soft-fp/mulsf3.c:(.text+0x84): relocation truncated to fit: R_MIPS_GOT16 against `.rodata'
collect2: error: ld returned 1 exit status
in linking stage for wma.elf and few other codecs.
But it linked without error (just with few warnings) with hard-float libgcc.a for mulsf3.o, ltsf2.o, floatsisf.o, adddf3.o, fixdfsi.o, extendsfdf2.o, _divdi3.o
Code: [Select]
/usr/local/mips-linux-gnu-ingenic-gcc7.2.0/bin/../lib/gcc/mips-linux-gnu/7.2.0/../../../../mips-linux-gnu/bin/ld: Warning: /home/fix/rockbox/rockbox/build5.2.0/lib/rbcodec/codecs/wma.elf uses -msoft-float (set by /home/fix/rockbox/rockbox/build5.2.0/lib/rbcodec/codecs/wma.o), /usr/local/mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a(_divdi3.o) uses -mhard-float
To work around with error "relocation truncated to fit: R_MIPS_GOT16 against `.rodata'" I compared two generated wma.map files from Rockbox TC GCC4.9.2 and Ingenic TC GCC7.2.0.
I see more ".eh_frame" sections in map generated with Ingenic TC GCC7.2.0 but don't understand how it can help.
I googled only two solutions to work around with it, and only one for MIPS: add -mxgot to CFLAGS but it does not help.
---
Also I see the difference here like "linker stubs" and  ".pic.". So is it toolchain problem?
Code: [Select]
.text.stub.7   0x0000000083d07c20       0x10 linker stubs
                0x0000000083d07c28                .pic.__mulsf3
 .text          0x0000000083d07c30       0x10 /usr/local/mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a(mulsf3.o)
                0x0000000083d07c30                __mulsf3
---
I found why -mxgot does not help. GCC docs for target MIPS says "These options have no effect unless GCC is generating position independent code."
So I run readelf for libgcc.a/mulsf3.o from GC 7.2.0 and got output
Code: [Select]
Flags:                             0x70001007, noreorder, pic, cpic, o32, mips32r2for libgcc.a/mulsf3.o from Rockbox GCC4.9.2
Code: [Select]
Flags:                             0x1001, noreorder, o32, mips1I guess that "pic" flag is the issue.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on December 14, 2021, 06:29:44 AM
It seems I "fixed" that problem, but it leads to another.
I added to plugin.lds after data section
Code: [Select]
    . = .;
    _gp = ALIGN(16);
    .got ALIGN(4) :
    {
        *(.got.plt) *(.got)
        . = ALIGN(4) ;
    } > PLUGIN_RAM
but it leads to section overflow for 264bytes for two cases, and 'not fit to PLUGIN_RAM' for apps/plugins/sdl/duke3d.*
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: amachronic on December 14, 2021, 06:39:10 AM
Hmm, I guess it makes sense we need to support GOT in the linker scripts. I never thought of that! ::) I hope you get it worked out -- I'm no expert on sorting out weird linker issues, so I don't have any specific suggestions. Perhaps you should compare with the default linker scripts (shipped with the toolchain) for more hints?

Anyhow, there's a copy of the 'mxu_as' script here: https://github.com/OpenNoahEdu/ingenic-jz-crosstools-src (https://github.com/OpenNoahEdu/ingenic-jz-crosstools-src). I don't remember finding it on Ingenic's FTP site. If your goal here is to experiment with MXU this might be a lot easier than fighting the linker; all you'd have to do is set up special make rules.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on December 14, 2021, 04:33:12 PM
Perhaps you should compare with the default linker scripts (shipped with the toolchain) for more hints?
Thanks! It's best advice that has helped me.
I reviewed linker script from toolchain mips-linux-gnu-ingenic-gcc7.2.0/mips-linux-gnu/lib/ldscripts/elf32ltsmip.x and found how fix the problem with GOT and section overfill (just grabbed few strings basically).
And it works! All plugins, demo and games run without errors usung newest Ingenic GCC 7.2.0 TC and with same GCCOPTS flags that generated with Rockbox configure and its GCC4.9.2 TC.
But with my horrific additional flags that I added during fighting with linker, only 3D games (quake, doom, wolf3d, duke3d) failed and demo/fft ("TLB refill handler at ..."). So it's all can be fixed with right flags.
So here are patchs. Those sorts are not necessary but why not use it.
I use -DGCC720 in GCCOPTS, it's not perfect platform check.

Code: [Select]
--- rockbox/apps/plugins/plugin.lds 2021-11-30 23:15:20.509125218 +0300
+++ rockbox_new/apps/plugins/plugin.lds 2021-12-14 22:22:27.354083567 +0300
@@ -7,7 +7,11 @@
 #elif defined(CPU_ARM)
 OUTPUT_FORMAT(elf32-littlearm)
 #elif defined(CPU_MIPS)
+#ifdef GCC720
+OUTPUT_FORMAT(elf32-tradlittlemips)
+#else
 OUTPUT_FORMAT(elf32-littlemips)
+#endif
 #else
 /* We can have an #error here we don't use this file when build sims! */
 #error Unknown CPU architecture
@@ -266,20 +270,51 @@
 
     .rodata :
     {
-        *(.rodata*)
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
 #if defined(IRAMSIZE) && IRAMSIZE == 0
-        *(.irodata)
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.irodata)))
 #endif
     } > PLUGIN_RAM
-
+#ifdef GCC720
+    .got.plt        : { *(.got.plt) }
+#endif
     .data :
     {
-        *(.data*)
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.data*)))
 #if defined(IRAMSIZE) && IRAMSIZE == 0
-        *(.idata)
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.idata)))
 #endif
     } > PLUGIN_RAM
 
+#ifdef GCC720
+    . = .;
+    . = .;
+    HIDDEN (_gp = ALIGN (16) + 0x7ff0);
+    .got :
+    {
+        *(.got)
+    } > PLUGIN_RAM
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+    .sdata          :
+    {
+        *(.sdata .sdata.* .gnu.linkonce.s.*)
+    } > PLUGIN_RAM
+    .lit8           : { *(.lit8) }
+    .lit4           : { *(.lit4) }
+    _edata = .; PROVIDE (edata = .);
+    . = .;
+    __bss_start = .;
+    _fbss = .;
+    .sbss           :
+    {
+       *(.dynsbss)
+       *(.sbss .sbss.* .gnu.linkonce.sb.*)
+       *(.scommon)
+    } > PLUGIN_RAM
+#endif
+
 #if NOCACHE_BASE != 0
     .ncdata . + NOCACHE_BASE :
     {
@@ -320,8 +355,20 @@
         *(.ibss)
 #endif
         *(COMMON)
+#ifdef GCC720
+   /* Align here to ensure that the .bss section occupies space up to
+      _end.  Align after .bss to ensure correct alignment even if the
+      .bss section disappears because there are no input sections.
+      FIXME: Why do we need it? When there is no .bss section, we don't
+      pad the .data section.  */
+   . = ALIGN(. != 0 ? 32 / 8 : 1);
+#else
         . = ALIGN(0x4);
+#endif
     } > PLUGIN_RAM
+#ifdef GCC720
+      . = ALIGN(32 / 8);
+#endif
 
 #if NOCACHE_BASE != 0
     .ncbss . + NOCACHE_BASE (NOLOAD) :

Code: [Select]
--- rockbox/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 23:15:21.424138771 +0300
+++ rockbox_new/firmware/target/mips/ingenic_x1000/spl.lds 2021-12-12 19:41:03.927982128 +0300
@@ -1,7 +1,11 @@
 #include "config.h"
 #include "cpu.h"
 
-OUTPUT_FORMAT("elf32-littlemips")
+#ifdef GCC720
+OUTPUT_FORMAT(elf32-tradlittlemips)
+#else
+OUTPUT_FORMAT(elf32-littlemips)
+#endif
 OUTPUT_ARCH(MIPS)
 ENTRY(_spl_start)
 STARTUP(target/mips/ingenic_x1000/spl-start.o)

Code: [Select]
--- rockbox/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 23:15:21.417138667 +0300
+++ rockbox_new/firmware/target/mips/ingenic_x1000/app.lds 2021-12-13 21:23:24.324047688 +0300
@@ -1,7 +1,11 @@
 #include "config.h"
 #include "cpu.h"
 
-OUTPUT_FORMAT("elf32-littlemips")
+#ifdef GCC720
+OUTPUT_FORMAT(elf32-tradlittlemips)
+#else
+OUTPUT_FORMAT(elf32-littlemips)
+#endif
 OUTPUT_ARCH(MIPS)
 ENTRY(_start)
 STARTUP(target/mips/ingenic_x1000/crt0.o)
@@ -31,14 +35,14 @@
     . = ALIGN(4);
     .rodata :
     {
-        *(.rodata*);
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)));
     } > DRAM
 
     . = ALIGN(4);
     .data :
     {
-        *(.data*);
-        *(.sdata*);
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.data*)));
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.sdata*)));
     } > DRAM
 
     .iram X1000_IRAM_BASE: AT (_bssbegin)
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: amachronic on December 14, 2021, 06:25:06 PM
Nice work! It turns out the GOT/PIC stuff is all specified in the System V ABI (http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf (http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf)), now that I know what to look for. There's one thing I don't understand: how can this work without changing the startup code? I'd imagine it at least needs to initialize register t9 before jumping to PIC code?

I'm basically happy to merge this, though I'd like to experiment a bit to find just the minimum needed to make PIC work, rather than blindly copying from GCC/binutils. For example I see no need for that .bss alignment voodoo, but perhaps they do it for a good reason. Aside from PIC, it seems the only thing necessary to support the Ingenic toolchain is using elf32-tradlittlemips instead of elf32-littlemips.
Title: Re: Ingenic MIPS GCC 7.2.0 Toolchain to compile m3k native port
Post by: vitt13 on December 15, 2021, 01:56:44 AM
Also found this linker script from jz4730 sources with similar "trick" for small data.
Code: [Select]
*   DESCRIPTION :                                                         *
*   Linker script file                                                    *
*                                                                         *
**************************************************************************/

OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_ARCH(mips)

/**** Start point ****/
ENTRY(_start) /* Entry point of application */

MEMORY
{
    ram (wx) : ORIGIN = 0x80000000, LENGTH = 32M
}

SECTIONS
{
  /**** Code and read-only data ****/

  .text 0x80100000 :
  {
    _ftext = ABSOLUTE(.) ; /* Start of code and read-only data */
    *(.text*)
    *(.gnu.linkonce.*)
    *(__libc*)
    _ecode = ABSOLUTE(.) ; /* End of code */

    *(.rodata*)

    . = ALIGN(8);
    _etext = ABSOLUTE(.); /* End of code and read-only data */
  } > ram

  /**** Initialised data ****/

  .data :
  {
    _fdata = ABSOLUTE(.); /* Start of initialised data */
    *(.data*)
    *(.eh_frame*)
    *(.gcc_except_table*)
   
    . = ALIGN(8);
    __CTOR_LIST__ = ABSOLUTE(.);
    KEEP(*(SORT(.ctors*)))
    __CTOR_END__ = ABSOLUTE(.);
    __DTOR_LIST__ = ABSOLUTE(.);
    KEEP(*(SORT(.dtors*)))
    __DTOR_END__ = ABSOLUTE(.);

    _gp = ABSOLUTE(. + 0x7ff0); /* Base of small data */

    *(.lit8)
    *(.lit4)
    *(.sdata)

    . = ALIGN(8);

    _edata  = ABSOLUTE(.); /* End of initialised data */
  } > ram

  /**** Uninitialised data ****/

  _fbss = .; /* Start of uninitialised data */

  .sbss :
  {
    *(.sbss)
    *(.scommon)
  }
  .bss :
  {
    *(.bss)
    *(COMMON)

    /* Allocate room for stack */
    .   =  ALIGN(8) ;
    _freemem = .;
  }

  _end = . ; /* End of unitialised data */

  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }

  /DISCARD/ :
  {
    *(.reginfo)
  }

  PROVIDE(etext = _etext);
  PROVIDE (edata = .);
  PROVIDE (end = .);
}