Recent Posts
1
Plugins/Viewers / Re: Midi Player
« Last post by ariebe9115 on June 24, 2021, 12:29:53 PM »Yo, i rockboxed my Sansa e260v1 and everytime i open a midi, it says no instrument found, i have no patchset but i found out there is one saved in /.rockbox/timidity/instruments/
But well, cant use it anyways, i am not feeling in the mood to do anymore, tried copy pasting this set, renaming the folder but it just got annoying, do i need to remap every patch in the .cfg? Would be lots of work =/
But well, cant use it anyways, i am not feeling in the mood to do anymore, tried copy pasting this set, renaming the folder but it just got annoying, do i need to remap every patch in the .cfg? Would be lots of work =/
2
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by amachronic on June 24, 2021, 06:21:53 AM »Yeah that's the manual I mean, and you have the GPIO numbering right. I have a "later" version of the manual which I got from Ingenic's FTP last year, marked October 2018. I don't know if there are any meaningful differences.
Re. power supply voltages -- after a reset all voltages will return to a default setting, and they can't be changed until fairly late in the boot. The ranges you got are simply ranges supported by the chip, and somewhere else, there may be an actual voltage setting. That might be in a data table, or could be buried inside a function call; who knows. But if none of the defaults are changed, then there may be nothing to see, unless they decided to redundantly set the defaults somewhere. The OF should be able to report the voltages through sysfs; I don't remember the full paths, but they are named axp_supplyer.N. I think that's how I learned about the Q1's voltage levels, because digging in the kernel wasn't revealing much. The M3K just used default voltages.
X1000 and AXP192 datasheets: https://drive.google.com/drive/folders/19Z_nSW88B7ibtFly0IaWw-yRYT97t9e7
Re. power supply voltages -- after a reset all voltages will return to a default setting, and they can't be changed until fairly late in the boot. The ranges you got are simply ranges supported by the chip, and somewhere else, there may be an actual voltage setting. That might be in a data table, or could be buried inside a function call; who knows. But if none of the defaults are changed, then there may be nothing to see, unless they decided to redundantly set the defaults somewhere. The OF should be able to report the voltages through sysfs; I don't remember the full paths, but they are named axp_supplyer.N. I think that's how I learned about the Q1's voltage levels, because digging in the kernel wasn't revealing much. The M3K just used default voltages.
X1000 and AXP192 datasheets: https://drive.google.com/drive/folders/19Z_nSW88B7ibtFly0IaWw-yRYT97t9e7
3
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 23, 2021, 10:22:04 PM »One more data dump for posterity - I think I have some AXP stuff here. I wanted to find this so I could make sure the first attempts wouldn't set them wrong and kill whatever they're hooked up to...
Notes from above:
Code: [Select]
regulator_init_data_ARRAY_80510ca8[1].*supply_ XREF[1,8]: 80510c38(*), 80510c44(*),
regulator_init_data_ARRAY_80510ca8[2].*supply_ 80510c50(*), 80510c5c(*),
regulator_init_data_ARRAY_80510ca8[3].*supply_ 80510c68(*), 80510c74(*),
regulator_init_data_ARRAY_80510ca8[4].*supply_ 80510c80(*), 80510c8c(*),
regulator_init_data_ARRAY_80510ca8[5].*supply_ 80510c98(*)
regulator_init_data_ARRAY_80510ca8[6].*supply_
regulator_init_data_ARRAY_80510ca8[7].*supply_
regulator_init_data_ARRAY_80510ca8[8].*supply_
regulator_init_data_ARRAY_80510ca8
80510ca8 00 00 00 regulato
00 5c 75
4b 80 d0
80510ca8 00 00 00 00 5c regulato [0] XREF[1]: 80510c38(*)
75 4b 80 d0 12
13 00 d0 12 13
80510ca8 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c38(*)
80510cac 5c 75 4b 80 d0 regulati constraints
12 13 00 d0 12
13 00 00 00 00
80510cac 5c 75 4b 80 char * s_axp_ldo1_804b755c *name = "axp_ldo1"
80510cb0 d0 12 13 00 int 1312D0h min_uV v output range - v
80510cb4 d0 12 13 00 int 1312D0h max_uV v output range - v
80510cb8 00 00 00 00 int 0h uV_offset
80510cbc 00 00 00 00 int 0h min_uA i output range - i
80510cc0 00 00 00 00 int 0h max_uA i output range - i
80510cc4 00 00 00 00 uint 0h valid_modes_
80510cc8 00 00 00 00 uint 0h valid_ops_mask
80510ccc 00 00 00 00 int 0h input_uV input v, if supply
80510cd0 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510cd0 00 00 00 00 int 0h uV suspend voltage
80510cd4 00 00 00 00 uint 0h mode suspend reg operat
80510cd8 00 00 00 00 int 0h enabled reg enabled in sus
80510cdc 00 00 00 00 int 0h disabled reg disabled in su
80510ce0 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510ce0 00 00 00 00 int 0h uV suspend voltage
80510ce4 00 00 00 00 uint 0h mode suspend reg operat
80510ce8 00 00 00 00 int 0h enabled reg enabled in sus
80510cec 00 00 00 00 int 0h disabled reg disabled in su
80510cf0 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510cf0 00 00 00 00 int 0h uV suspend voltage
80510cf4 00 00 00 00 uint 0h mode suspend reg operat
80510cf8 00 00 00 00 int 0h enabled reg enabled in sus
80510cfc 00 00 00 00 int 0h disabled reg disabled in su
80510d00 00 00 00 00 int 0h initial_state
80510d04 00 00 00 00 uint 0h initial_mode
80510d08 00 00 00 00 uint 0h ramp_delay
80510d0c 00 uint:1 0h always_on:1
80510d0c 00 uint:1 0h boot_on:1
80510d0c 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510d10 01 00 00 00 int 1h num_consumer
80510d14 0c 11 51 80 regulato DAT_8051110c *consumer_su
80510d18 00 00 00 00 int * 00000000 *regulator_i
80510d1c 00 00 00 00 void * 00000000 *driver_data
80510d20 00 00 00 00 68 regulato [1] XREF[1]: 80510c44(*)
75 4b 80 40 77
1b 00 a0 5a 32
80510d20 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c44(*)
80510d24 68 75 4b 80 40 regulati constraints
77 1b 00 a0 5a
32 00 00 00 00
80510d24 68 75 4b 80 char * s_axp_ldo2_804b7568 *name = "axp_ldo2"
80510d28 40 77 1b 00 int 1B7740h min_uV v output range - v
80510d2c a0 5a 32 00 int 325AA0h max_uV v output range - v
80510d30 00 00 00 00 int 0h uV_offset
80510d34 00 00 00 00 int 0h min_uA i output range - i
80510d38 00 00 00 00 int 0h max_uA i output range - i
80510d3c 00 00 00 00 uint 0h valid_modes_
80510d40 09 00 00 00 uint 9h valid_ops_mask
80510d44 00 00 00 00 int 0h input_uV input v, if supply
80510d48 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510d48 00 00 00 00 int 0h uV suspend voltage
80510d4c 00 00 00 00 uint 0h mode suspend reg operat
80510d50 00 00 00 00 int 0h enabled reg enabled in sus
80510d54 00 00 00 00 int 0h disabled reg disabled in su
80510d58 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510d58 00 00 00 00 int 0h uV suspend voltage
80510d5c 00 00 00 00 uint 0h mode suspend reg operat
80510d60 00 00 00 00 int 0h enabled reg enabled in sus
80510d64 00 00 00 00 int 0h disabled reg disabled in su
80510d68 a0 5a 32 00 00 regulato state_standby
00 00 00 01 00
00 00 00 00 00
80510d68 a0 5a 32 00 int 325AA0h uV suspend voltage
80510d6c 00 00 00 00 uint 0h mode suspend reg operat
80510d70 01 00 00 00 int 1h enabled reg enabled in sus
80510d74 00 00 00 00 int 0h disabled reg disabled in su
80510d78 02 00 00 00 int 2h initial_state
80510d7c 00 00 00 00 uint 0h initial_mode
80510d80 00 00 00 00 uint 0h ramp_delay
80510d84 00 uint:1 0h always_on:1
80510d84 00 uint:1 0h boot_on:1
80510d84 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510d88 01 00 00 00 int 1h num_consumer
80510d8c 14 11 51 80 regulato DAT_80511114 *consumer_su
80510d90 00 00 00 00 int * 00000000 *regulator_i
80510d94 00 00 00 00 void * 00000000 *driver_data
80510d98 00 00 00 00 74 regulato [2] XREF[1]: 80510c50(*)
75 4b 80 60 ae
0a 00 e0 67 35
80510d98 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c50(*)
80510d9c 74 75 4b 80 60 regulati constraints
ae 0a 00 e0 67
35 00 00 00 00
80510d9c 74 75 4b 80 char * s_axp_ldo3_804b7574 *name = "axp_ldo3"
80510da0 60 ae 0a 00 int AAE60h min_uV v output range - v
80510da4 e0 67 35 00 int 3567E0h max_uV v output range - v
80510da8 00 00 00 00 int 0h uV_offset
80510dac 00 00 00 00 int 0h min_uA i output range - i
80510db0 00 00 00 00 int 0h max_uA i output range - i
80510db4 00 00 00 00 uint 0h valid_modes_
80510db8 09 00 00 00 uint 9h valid_ops_mask
80510dbc 00 00 00 00 int 0h input_uV input v, if supply
80510dc0 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510dc0 00 00 00 00 int 0h uV suspend voltage
80510dc4 00 00 00 00 uint 0h mode suspend reg operat
80510dc8 00 00 00 00 int 0h enabled reg enabled in sus
80510dcc 00 00 00 00 int 0h disabled reg disabled in su
80510dd0 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510dd0 00 00 00 00 int 0h uV suspend voltage
80510dd4 00 00 00 00 uint 0h mode suspend reg operat
80510dd8 00 00 00 00 int 0h enabled reg enabled in sus
80510ddc 00 00 00 00 int 0h disabled reg disabled in su
80510de0 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510de0 00 00 00 00 int 0h uV suspend voltage
80510de4 00 00 00 00 uint 0h mode suspend reg operat
80510de8 00 00 00 00 int 0h enabled reg enabled in sus
80510dec 00 00 00 00 int 0h disabled reg disabled in su
80510df0 00 00 00 00 int 0h initial_state
80510df4 00 00 00 00 uint 0h initial_mode
80510df8 00 00 00 00 uint 0h ramp_delay
80510dfc 00 uint:1 0h always_on:1
80510dfc 00 uint:1 0h boot_on:1
80510dfc 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510e00 01 00 00 00 int 1h num_consumer
80510e04 1c 11 51 80 regulato DAT_8051111c *consumer_su
80510e08 00 00 00 00 int * 00000000 *regulator_i
80510e0c 00 00 00 00 void * 00000000 *driver_data
80510e10 00 00 00 00 80 regulato [3] XREF[1]: 80510c5c(*)
75 4b 80 40 77
1b 00 a0 5a 32
80510e10 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c5c(*)
80510e14 80 75 4b 80 40 regulati constraints
77 1b 00 a0 5a
32 00 00 00 00
80510e14 80 75 4b 80 char * s_axp_ldo4_804b7580 *name = "axp_ldo4"
80510e18 40 77 1b 00 int 1B7740h min_uV v output range - v
80510e1c a0 5a 32 00 int 325AA0h max_uV v output range - v
80510e20 00 00 00 00 int 0h uV_offset
80510e24 00 00 00 00 int 0h min_uA i output range - i
80510e28 00 00 00 00 int 0h max_uA i output range - i
80510e2c 00 00 00 00 uint 0h valid_modes_
80510e30 09 00 00 00 uint 9h valid_ops_mask
80510e34 00 00 00 00 int 0h input_uV input v, if supply
80510e38 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510e38 00 00 00 00 int 0h uV suspend voltage
80510e3c 00 00 00 00 uint 0h mode suspend reg operat
80510e40 00 00 00 00 int 0h enabled reg enabled in sus
80510e44 00 00 00 00 int 0h disabled reg disabled in su
80510e48 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510e48 00 00 00 00 int 0h uV suspend voltage
80510e4c 00 00 00 00 uint 0h mode suspend reg operat
80510e50 00 00 00 00 int 0h enabled reg enabled in sus
80510e54 00 00 00 00 int 0h disabled reg disabled in su
80510e58 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510e58 00 00 00 00 int 0h uV suspend voltage
80510e5c 00 00 00 00 uint 0h mode suspend reg operat
80510e60 00 00 00 00 int 0h enabled reg enabled in sus
80510e64 00 00 00 00 int 0h disabled reg disabled in su
80510e68 00 00 00 00 int 0h initial_state
80510e6c 00 00 00 00 uint 0h initial_mode
80510e70 00 00 00 00 uint 0h ramp_delay
80510e74 00 uint:1 0h always_on:1
80510e74 00 uint:1 0h boot_on:1
80510e74 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510e78 01 00 00 00 int 1h num_consumer
80510e7c 24 11 51 80 regulato DAT_80511124 *consumer_su
80510e80 00 00 00 00 int * 00000000 *regulator_i
80510e84 00 00 00 00 void * 00000000 *driver_data
80510e88 00 00 00 00 8c regulato [4] XREF[1]: 80510c68(*)
75 4b 80 60 ae
0a 00 e0 67 35
80510e88 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c68(*)
80510e8c 8c 75 4b 80 60 regulati constraints
ae 0a 00 e0 67
35 00 00 00 00
80510e8c 8c 75 4b 80 char * s_axp_buck1_804b758c *name = "axp_buck1"
80510e90 60 ae 0a 00 int AAE60h min_uV v output range - v
80510e94 e0 67 35 00 int 3567E0h max_uV v output range - v
80510e98 00 00 00 00 int 0h uV_offset
80510e9c 00 00 00 00 int 0h min_uA i output range - i
80510ea0 00 00 00 00 int 0h max_uA i output range - i
80510ea4 00 00 00 00 uint 0h valid_modes_
80510ea8 09 00 00 00 uint 9h valid_ops_mask
80510eac 00 00 00 00 int 0h input_uV input v, if supply
80510eb0 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510eb0 00 00 00 00 int 0h uV suspend voltage
80510eb4 00 00 00 00 uint 0h mode suspend reg operat
80510eb8 00 00 00 00 int 0h enabled reg enabled in sus
80510ebc 00 00 00 00 int 0h disabled reg disabled in su
80510ec0 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510ec0 00 00 00 00 int 0h uV suspend voltage
80510ec4 00 00 00 00 uint 0h mode suspend reg operat
80510ec8 00 00 00 00 int 0h enabled reg enabled in sus
80510ecc 00 00 00 00 int 0h disabled reg disabled in su
80510ed0 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510ed0 00 00 00 00 int 0h uV suspend voltage
80510ed4 00 00 00 00 uint 0h mode suspend reg operat
80510ed8 00 00 00 00 int 0h enabled reg enabled in sus
80510edc 00 00 00 00 int 0h disabled reg disabled in su
80510ee0 00 00 00 00 int 0h initial_state
80510ee4 00 00 00 00 uint 0h initial_mode
80510ee8 00 00 00 00 uint 0h ramp_delay
80510eec 00 uint:1 0h always_on:1
80510eec 00 uint:1 0h boot_on:1
80510eec 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510ef0 01 00 00 00 int 1h num_consumer
80510ef4 2c 11 51 80 regulato DAT_8051112c *consumer_su
80510ef8 00 00 00 00 int * 00000000 *regulator_i
80510efc 00 00 00 00 void * 00000000 *driver_data
80510f00 00 00 00 00 98 regulato [5] XREF[1]: 80510c74(*)
75 4b 80 60 ae
0a 00 b8 b6 22
80510f00 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c74(*)
80510f04 98 75 4b 80 60 regulati constraints
ae 0a 00 b8 b6
22 00 00 00 00
80510f04 98 75 4b 80 char * s_axp_buck2_804b7598 *name = "axp_buck2"
80510f08 60 ae 0a 00 int AAE60h min_uV v output range - v
80510f0c b8 b6 22 00 int 22B6B8h max_uV v output range - v
80510f10 00 00 00 00 int 0h uV_offset
80510f14 00 00 00 00 int 0h min_uA i output range - i
80510f18 00 00 00 00 int 0h max_uA i output range - i
80510f1c 00 00 00 00 uint 0h valid_modes_
80510f20 09 00 00 00 uint 9h valid_ops_mask
80510f24 00 00 00 00 int 0h input_uV input v, if supply
80510f28 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510f28 00 00 00 00 int 0h uV suspend voltage
80510f2c 00 00 00 00 uint 0h mode suspend reg operat
80510f30 00 00 00 00 int 0h enabled reg enabled in sus
80510f34 00 00 00 00 int 0h disabled reg disabled in su
80510f38 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510f38 00 00 00 00 int 0h uV suspend voltage
80510f3c 00 00 00 00 uint 0h mode suspend reg operat
80510f40 00 00 00 00 int 0h enabled reg enabled in sus
80510f44 00 00 00 00 int 0h disabled reg disabled in su
80510f48 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510f48 00 00 00 00 int 0h uV suspend voltage
80510f4c 00 00 00 00 uint 0h mode suspend reg operat
80510f50 00 00 00 00 int 0h enabled reg enabled in sus
80510f54 00 00 00 00 int 0h disabled reg disabled in su
80510f58 00 00 00 00 int 0h initial_state
80510f5c 00 00 00 00 uint 0h initial_mode
80510f60 00 00 00 00 uint 0h ramp_delay
80510f64 00 uint:1 0h always_on:1
80510f64 00 uint:1 0h boot_on:1
80510f64 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510f68 01 00 00 00 int 1h num_consumer
80510f6c 34 11 51 80 regulato DAT_80511134 *consumer_su
80510f70 00 00 00 00 int * 00000000 *regulator_i
80510f74 00 00 00 00 void * 00000000 *driver_data
80510f78 00 00 00 00 a4 regulato [6] XREF[1]: 80510c80(*)
75 4b 80 60 ae
0a 00 e0 67 35
80510f78 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c80(*)
80510f7c a4 75 4b 80 60 regulati constraints
ae 0a 00 e0 67
35 00 00 00 00
80510f7c a4 75 4b 80 char * s_axp_buck3_804b75a4 *name = "axp_buck3"
80510f80 60 ae 0a 00 int AAE60h min_uV v output range - v
80510f84 e0 67 35 00 int 3567E0h max_uV v output range - v
80510f88 00 00 00 00 int 0h uV_offset
80510f8c 00 00 00 00 int 0h min_uA i output range - i
80510f90 00 00 00 00 int 0h max_uA i output range - i
80510f94 00 00 00 00 uint 0h valid_modes_
80510f98 09 00 00 00 uint 9h valid_ops_mask
80510f9c 00 00 00 00 int 0h input_uV input v, if supply
80510fa0 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80510fa0 00 00 00 00 int 0h uV suspend voltage
80510fa4 00 00 00 00 uint 0h mode suspend reg operat
80510fa8 00 00 00 00 int 0h enabled reg enabled in sus
80510fac 00 00 00 00 int 0h disabled reg disabled in su
80510fb0 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80510fb0 00 00 00 00 int 0h uV suspend voltage
80510fb4 00 00 00 00 uint 0h mode suspend reg operat
80510fb8 00 00 00 00 int 0h enabled reg enabled in sus
80510fbc 00 00 00 00 int 0h disabled reg disabled in su
80510fc0 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80510fc0 00 00 00 00 int 0h uV suspend voltage
80510fc4 00 00 00 00 uint 0h mode suspend reg operat
80510fc8 00 00 00 00 int 0h enabled reg enabled in sus
80510fcc 00 00 00 00 int 0h disabled reg disabled in su
80510fd0 00 00 00 00 int 0h initial_state
80510fd4 00 00 00 00 uint 0h initial_mode
80510fd8 00 00 00 00 uint 0h ramp_delay
80510fdc 00 uint:1 0h always_on:1
80510fdc 00 uint:1 0h boot_on:1
80510fdc 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80510fe0 01 00 00 00 int 1h num_consumer
80510fe4 3c 11 51 80 regulato DAT_8051113c *consumer_su
80510fe8 00 00 00 00 int * 00000000 *regulator_i
80510fec 00 00 00 00 void * 00000000 *driver_data
80510ff0 00 00 00 00 b0 regulato [7] XREF[1]: 80510c8c(*)
75 4b 80 60 ae
0a 00 e0 67 35
80510ff0 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c8c(*)
80510ff4 b0 75 4b 80 60 regulati constraints
ae 0a 00 e0 67
35 00 00 00 00
80510ff4 b0 75 4b 80 char * s_axp_buck4_804b75b0 *name = "axp_buck4"
80510ff8 60 ae 0a 00 int AAE60h min_uV v output range - v
80510ffc e0 67 35 00 int 3567E0h max_uV v output range - v
80511000 00 00 00 00 int 0h uV_offset
80511004 00 00 00 00 int 0h min_uA i output range - i
80511008 00 00 00 00 int 0h max_uA i output range - i
8051100c 00 00 00 00 uint 0h valid_modes_
80511010 09 00 00 00 uint 9h valid_ops_mask
80511014 00 00 00 00 int 0h input_uV input v, if supply
80511018 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80511018 00 00 00 00 int 0h uV suspend voltage
8051101c 00 00 00 00 uint 0h mode suspend reg operat
80511020 00 00 00 00 int 0h enabled reg enabled in sus
80511024 00 00 00 00 int 0h disabled reg disabled in su
80511028 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
80511028 00 00 00 00 int 0h uV suspend voltage
8051102c 00 00 00 00 uint 0h mode suspend reg operat
80511030 00 00 00 00 int 0h enabled reg enabled in sus
80511034 00 00 00 00 int 0h disabled reg disabled in su
80511038 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
80511038 00 00 00 00 int 0h uV suspend voltage
8051103c 00 00 00 00 uint 0h mode suspend reg operat
80511040 00 00 00 00 int 0h enabled reg enabled in sus
80511044 00 00 00 00 int 0h disabled reg disabled in su
80511048 00 00 00 00 int 0h initial_state
8051104c 00 00 00 00 uint 0h initial_mode
80511050 00 00 00 00 uint 0h ramp_delay
80511054 00 uint:1 0h always_on:1
80511054 00 uint:1 0h boot_on:1
80511054 00 00 00 00 uint:1 0h apply_uV apply uV constrain
80511058 01 00 00 00 int 1h num_consumer
8051105c 44 11 51 80 regulato DAT_80511144 *consumer_su
80511060 00 00 00 00 int * 00000000 *regulator_i
80511064 00 00 00 00 void * 00000000 *driver_data
80511068 00 00 00 00 bc regulato [8] XREF[1]: 80510c98(*)
75 4b 80 40 77
1b 00 a0 5a 32
80511068 00 00 00 00 char * 00000000 *supply_regu XREF[1]: 80510c98(*)
8051106c bc 75 4b 80 40 regulati constraints
77 1b 00 a0 5a
32 00 00 00 00
8051106c bc 75 4b 80 char * s_axp_ldoio0_804b75bc *name = "axp_ldoio0"
80511070 40 77 1b 00 int 1B7740h min_uV v output range - v
80511074 a0 5a 32 00 int 325AA0h max_uV v output range - v
80511078 00 00 00 00 int 0h uV_offset
8051107c 00 00 00 00 int 0h min_uA i output range - i
80511080 00 00 00 00 int 0h max_uA i output range - i
80511084 00 00 00 00 uint 0h valid_modes_
80511088 09 00 00 00 uint 9h valid_ops_mask
8051108c 00 00 00 00 int 0h input_uV input v, if supply
80511090 00 00 00 00 00 regulato state_disk
00 00 00 00 00
00 00 00 00 00
80511090 00 00 00 00 int 0h uV suspend voltage
80511094 00 00 00 00 uint 0h mode suspend reg operat
80511098 00 00 00 00 int 0h enabled reg enabled in sus
8051109c 00 00 00 00 int 0h disabled reg disabled in su
805110a0 00 00 00 00 00 regulato state_mem
00 00 00 00 00
00 00 00 00 00
805110a0 00 00 00 00 int 0h uV suspend voltage
805110a4 00 00 00 00 uint 0h mode suspend reg operat
805110a8 00 00 00 00 int 0h enabled reg enabled in sus
805110ac 00 00 00 00 int 0h disabled reg disabled in su
805110b0 00 00 00 00 00 regulato state_standby
00 00 00 00 00
00 00 00 00 00
805110b0 00 00 00 00 int 0h uV suspend voltage
805110b4 00 00 00 00 uint 0h mode suspend reg operat
805110b8 00 00 00 00 int 0h enabled reg enabled in sus
805110bc 00 00 00 00 int 0h disabled reg disabled in su
805110c0 00 00 00 00 int 0h initial_state
805110c4 00 00 00 00 uint 0h initial_mode
805110c8 00 00 00 00 uint 0h ramp_delay
805110cc 00 uint:1 0h always_on:1
805110cc 00 uint:1 0h boot_on:1
805110cc 00 00 00 00 uint:1 0h apply_uV apply uV constrain
805110d0 01 00 00 00 int 1h num_consumer
805110d4 4c 11 51 80 regulato DAT_8051114c *consumer_su
805110d8 00 00 00 00 int * 00000000 *regulator_i
805110dc 00 00 00 00 void * 00000000 *driver_data
axp_supply_init_data_805110e0 XREF[1]: 80510ca4(*)
805110e0 54 11 51 axp_supp
80 20 03
00 00 20
805110e0 54 11 51 80 power_su power_supply_info_8051 *battery_info = XREF[1]: 80510ca4(*)
805110e4 20 03 00 00 uint 320h chgcur
805110e8 20 03 00 00 uint 320h chgearcur
805110ec 20 03 00 00 uint 320h chgsuscur
805110f0 20 03 00 00 uint 320h chgclscur
805110f4 68 10 00 00 uint 1068h chgvol
805110f8 0a 00 00 00 uint Ah chgend
805110fc 00 00 00 00 int 0h limit_on
80511100 32 00 00 00 uint 32h chgpretime
80511104 e0 01 00 00 uint 1E0h chgcsttime
80511108 19 00 00 00 uint 19h adc_freq
DAT_8051110c XREF[1]: 80510d14(*)
8051110c 00 ?? 00h
8051110d 00 ?? 00h
8051110e 00 ?? 00h
8051110f 00 ?? 00h
80511110 60 75 4b 80 addr s_ldo1_804b755c+4 = "ldo1"
DAT_80511114 XREF[1]: 80510d8c(*)
80511114 00 ?? 00h
80511115 00 ?? 00h
80511116 00 ?? 00h
80511117 00 ?? 00h
80511118 6c 75 4b 80 addr s_ldo2_804b7568+4 = "ldo2"
DAT_8051111c XREF[1]: 80510e04(*)
8051111c 00 ?? 00h
8051111d 00 ?? 00h
8051111e 00 ?? 00h
8051111f 00 ?? 00h
80511120 78 75 4b 80 addr s_ldo3_804b7574+4 = "ldo3"
DAT_80511124 XREF[1]: 80510e7c(*)
80511124 00 ?? 00h
80511125 00 ?? 00h
80511126 00 ?? 00h
80511127 00 ?? 00h
80511128 84 75 4b 80 addr s_ldo4_804b7580+4 = "ldo4"
DAT_8051112c XREF[1]: 80510ef4(*)
8051112c 00 ?? 00h
8051112d 00 ?? 00h
8051112e 00 ?? 00h
8051112f 00 ?? 00h
80511130 c8 75 4b 80 addr s_dcdc1_804b75c8 = "dcdc1"
DAT_80511134 XREF[1]: 80510f6c(*)
80511134 00 ?? 00h
80511135 00 ?? 00h
80511136 00 ?? 00h
80511137 00 ?? 00h
80511138 d0 75 4b 80 addr s_vdd_cpu_804b75d0 = "vdd_cpu"
DAT_8051113c XREF[1]: 80510fe4(*)
8051113c 00 ?? 00h
8051113d 00 ?? 00h
8051113e 00 ?? 00h
8051113f 00 ?? 00h
80511140 d8 75 4b 80 addr s_dcdc3_804b75d8 = "dcdc3"
DAT_80511144 XREF[1]: 8051105c(*)
80511144 00 ?? 00h
80511145 00 ?? 00h
80511146 00 ?? 00h
80511147 00 ?? 00h
80511148 e0 75 4b 80 addr s_vdd_core_804b75e0 = "vdd_core"
DAT_8051114c XREF[1]: 805110d4(*)
8051114c 00 ?? 00h
8051114d 00 ?? 00h
8051114e 00 ?? 00h
8051114f 00 ?? 00h
80511150 c0 75 4b 80 addr s_ldoio0_804b75bc+4 = "ldoio0"
power_supply_info_80511154 XREF[1]: 805110e0(*)
80511154 ec 75 4b power_su
80 02 00
00 00 68
80511154 ec 75 4b 80 char * s_EASTROAD_804b75ec name = "EASTROAD" XREF[1]: 805110e0(*)
80511158 02 00 00 00 int 2h technology
8051115c 68 10 00 00 int 1068h voltage_max_
80511160 48 0d 00 00 int D48h voltage_min_
80511164 00 00 00 00 int 0h charge_full_
80511168 00 00 00 00 int 0h charge_empty
8051116c e4 0c 00 00 int CE4h energy_full_
80511170 00 00 00 00 int 0h energy_empty
80511174 00 00 00 00 int 0h use_for_apm
80511178 00 ?? 00h
80511179 00 ?? 00h
8051117a 00 ?? 00h
Notes from above:
Code: [Select]
dcdc1: 0.70 - 3.50
dcdc2: 0.70 - 2.275 *
dcdc3: 0.70 - 3.50
dcdc4: 0.70 - 3.50 **
ldo1: 1.25 - 1.25
ldo2: 1.80 - 3.30 ***
ldo3: 0.70 - 3.50
ldo4: 1.80 - 3.30
ldo io 0: 1.80 - 3.30
* dcdc2 notes: labelled "vdd_cpu"
**dcdc4 notes: labelled "vdd_core"
*** ldo2 notes: Standby state enabled, 3.30V, initial state "2"
4
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 23, 2021, 09:11:01 PM »Excellent, thanks for holding my hand through this!
Just a couple quick "this should be obvious, but..." questions -
When you say the manual, you're referring to this X1000 Programming Manual?
And it looks like the GPIOs map like this:
PA0-PA31 --> 0x00-0x1F
PB0-PB31 --> 0x20-0x3F
PC0-PC31 --> 0x40-0x5F
PD0-PD31 --> 0x60-0x6F
^^ Is that right?
Just a couple quick "this should be obvious, but..." questions -
When you say the manual, you're referring to this X1000 Programming Manual?
And it looks like the GPIOs map like this:
PA0-PA31 --> 0x00-0x1F
PB0-PB31 --> 0x20-0x3F
PC0-PC31 --> 0x40-0x5F
PD0-PD31 --> 0x60-0x6F
^^ Is that right?
5
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by amachronic on June 23, 2021, 06:50:49 PM »Yep, all the interface pins are set in stone. There's no need to track any of those down, they're in the X1000 datasheet. You're right about the DAC, I had assumed it's I2C but after looking at the datasheet it is in fact "dumb pins." That kinda works out in your favor since there's less to twiddle with to get audio going.
I was looking over all the stuff you posted and everything important should be here. There might be some audio related pins missing, but it's hard to tell at a glance. LCD and buttons are the 2 biggest target-specific drivers, ironically. GPIOs are the biggest platform dependent thing when it comes to other drivers. Your flash is the same chip used in the M3K so it's supported already. The AXP192 is probably on I2C bus#2 and its address is fixed; so if that's the only I2C device, it's not really necessary to seek out that info.
For the time being if you want to try running any code on your actual player you'll have to copy the M3K's SPL and monkey patch it until it works... the support is there for 32M memory size but it's totally untested and may be broken. There's another patch you need to do in order to USB boot Rockbox. Basically you just have to add these lines from the Q1 patch in order to initialize the system clocks when you directly boot rockbox.bin over USB.
The current early boot situation is far from ideal, and pretty hard to understand in its current form (even for me, and I wrote it, lol). I'm in the middle of rewriting all the X1000 NAND code, and then I have to refactor the SPL stuff to allow for code re-use between the M3K and Q1. But anyhow, if you have trouble getting rockbox to boot, whenever you decide to do it, then let me know.
I was looking over all the stuff you posted and everything important should be here. There might be some audio related pins missing, but it's hard to tell at a glance. LCD and buttons are the 2 biggest target-specific drivers, ironically. GPIOs are the biggest platform dependent thing when it comes to other drivers. Your flash is the same chip used in the M3K so it's supported already. The AXP192 is probably on I2C bus#2 and its address is fixed; so if that's the only I2C device, it's not really necessary to seek out that info.
Code: [Select]
LCD
---
24 bpp
8 bit bus
320x240
80 fps
power on
---
- PWR -> 1
- wait 20 ms
- RST -> 1
- wait 12 ms
power off
---
- PWR -> 0
- RST -> 0
backlight
---------
pwm0
30,000 ns period
gpios
-----
0x10 play key
0x11 volume up key
0x13 volume down key
0x25 out sel
0x26 analog power
0x27 backlight key
0x28 hp mute
0x29 lo power
0x2a msc pwr
0x2b msc cd
0x2c dac mute
0x2d lcd rst
0x2e lcd power
0x2f out mute
0x35 spdif en
0x37 ring1
0x38 ring2
0x3a rtc32k
0x3c menu key
0x53 bt reg on
0x58 prev key
0x59 BL PWR
0x64 next key
0x65 back key
It would be useful to find the AXP192 interrupt GPIO, but the Rockbox AXP driver can't use it yet. Headphone detection is usually wired to the AXP and I was planning to attach that to an interrupt instead of polling every 1/2 second like it currently does, but that's hardly super-important.For the time being if you want to try running any code on your actual player you'll have to copy the M3K's SPL and monkey patch it until it works... the support is there for 32M memory size but it's totally untested and may be broken. There's another patch you need to do in order to USB boot Rockbox. Basically you just have to add these lines from the Q1 patch in order to initialize the system clocks when you directly boot rockbox.bin over USB.
The current early boot situation is far from ideal, and pretty hard to understand in its current form (even for me, and I wrote it, lol). I'm in the middle of rewriting all the X1000 NAND code, and then I have to refactor the SPL stuff to allow for code re-use between the M3K and Q1. But anyhow, if you have trouble getting rockbox to boot, whenever you decide to do it, then let me know.
6
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 23, 2021, 04:48:07 PM »Maybe you could comment on whether these are X1000 standard / dedicated hw connections? I don't think I need to find pin number information for:
Flash
LCD controller data
I2C (do need to know bus/address)
SD Card
Flash
LCD controller data
I2C (do need to know bus/address)
SD Card
7
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 23, 2021, 04:38:51 PM »Your snd_x_probe has got to be the DAC/amp driver. But you probably guessed that already.
The "ring keys" confused me... but I looked up a review and it seems this player uses a rotating wheel -- right? -- so that'd be a rotary encoder. You've got all button GPIOs. The menu key is the one you hold to enter USB boot mode (due to it being on GPIO B28, see x1000 manual secs 27.1 and 19.3.2). The LCD looks straightforward. The current Rockbox driver should work, although I'm not 100% certain how the 24 bit depth is handled because I never tested it. That might require some trial and error if it doesn't work the first try, since the x1000 manual is next to useless when it comes to pixel formats, what gets sent on the bus and why.
By the way, lcd_initialize_begin/end get called to power the panel on and off. Not sure exactly where and when they are called but their purpose seems clear enough.
I think you have pretty much everything you need to do a port. The pin labels seem clear enough that you can just guess where they go just based on the chip datasheets. Well, except for spdif_en. I can't make heads or tails of that. There's nothing SPDIF-related on this player, is there?
Oh, and did you find out the i2c bus layout yet? it's in board_base_init, those two calls near the end. What i2c chips are you expecting anyway? AXP192 is there, so aside from that is it just the DAC?
Yeah, the ring keys are the wheel, sorry I probably should have mentioned that!
It looks to me like the PCM5102A is only configured through discrete pins, and doesn't actually have any sort of serial configuration interface. It's "dumb" - just feed it I2S data and it does DAC things.
I wasn't sure if maybe lcd_initialize_begin/end were called one after another for some reason - lcd_initialize_end seems like a weird way to say "power off".
I do still need to try to get some info out of the I2C section - I haven't gotten that far yet. I think the AXP192 might be the only I2C device, unless the bluetooth controller is hooked up via I2C.
I was just starting to make a list of stuff to see what we have and how much more info is needed - I haven't really been keeping track while I've been digging for info. Although I suppose a lot of stuff could be glossed over in favor of just getting something to work first.
Quote
spdif
Yeah, I have no idea what that's about. Bluetooth maybe? I don't think there's an S/PDIF out on this...
8
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by amachronic on June 23, 2021, 03:59:06 PM »Your snd_x_probe has got to be the DAC/amp driver. But you probably guessed that already .
The "ring keys" confused me... but I looked up a review and it seems this player uses a rotating wheel -- right? -- so that'd be a rotary encoder. You've got all button GPIOs. The menu key is the one you hold to enter USB boot mode (due to it being on GPIO B28, see x1000 manual secs 27.1 and 19.3.2). The LCD looks straightforward. The current Rockbox driver should work, although I'm not 100% certain how the 24 bit depth is handled because I never tested it. That might require some trial and error if it doesn't work the first try, since the x1000 manual is next to useless when it comes to pixel formats, what gets sent on the bus and why.
By the way, lcd_initialize_begin/end get called to power the panel on and off. Not sure exactly where and when they are called but their purpose seems clear enough.
I think you have pretty much everything you need to do a port. The pin labels seem clear enough that you can just guess where they go just based on the chip datasheets. Well, except for spdif_en. I can't make heads or tails of that. There's nothing SPDIF-related on this player, is there?
Oh, and did you find out the i2c bus layout yet? it's in board_base_init, those two calls near the end. What i2c chips are you expecting anyway? AXP192 is there, so aside from that is it just the DAC?
.The "ring keys" confused me... but I looked up a review and it seems this player uses a rotating wheel -- right? -- so that'd be a rotary encoder. You've got all button GPIOs. The menu key is the one you hold to enter USB boot mode (due to it being on GPIO B28, see x1000 manual secs 27.1 and 19.3.2). The LCD looks straightforward. The current Rockbox driver should work, although I'm not 100% certain how the 24 bit depth is handled because I never tested it. That might require some trial and error if it doesn't work the first try, since the x1000 manual is next to useless when it comes to pixel formats, what gets sent on the bus and why.
By the way, lcd_initialize_begin/end get called to power the panel on and off. Not sure exactly where and when they are called but their purpose seems clear enough.
I think you have pretty much everything you need to do a port. The pin labels seem clear enough that you can just guess where they go just based on the chip datasheets. Well, except for spdif_en. I can't make heads or tails of that. There's nothing SPDIF-related on this player, is there?
Oh, and did you find out the i2c bus layout yet? it's in board_base_init, those two calls near the end. What i2c chips are you expecting anyway? AXP192 is there, so aside from that is it just the DAC?
9
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 22, 2021, 11:30:28 PM »In no particular order, here's a small assortment of things I think I've ID'd:
Bluetooth Power Init:
RTC init (though I imagine it's identical to the m3k and q1:
snd_[something]_probe():
And the fact that apparently we have jzmmc_v1.2:
Bluetooth Power Init:
Code: [Select]
int power_init(void)
{
int iVar1;
iVar1 = gpio_request(0x53,s_bt_reg_on_804b7610);
if (iVar1 == 0) {
gpio_direction_output(0x53,0);
}
return iVar1;
}
RTC init (though I imagine it's identical to the m3k and q1:
Code: [Select]
void rtc32k_init(void)
{
int iVar1;
_DAT_805a2280 = 0;
iVar1 = gpio_request(0x3a,s_rtc32k_804b8ce0);
if (iVar1 == 0) {
_DAT_805a2284 = 1;
}
else {
pr_notice(s_[Error]_request_rtc32k_gpio_fail_804b8ce8);
}
return;
}
snd_[something]_probe():
Code: [Select]
int snd_x_probe(int param_1)
{
int iVar1;
DAT_805454c0 = param_1 + 0x10;
iVar1 = FUN_8034e318();
if (iVar1 != 0) {
dev_err(param_1 + 0x10,s_snd_soc_register_card_failed_%d_804fb778,iVar1);
}
iVar1 = gpio_request(0x28,s_HP_Mute_804fb79c);
if (iVar1 == 0) {
gpio_direction_output(0x28,0);
}
iVar1 = gpio_request(0x29,s_LO_Power_804fb7a4);
if (iVar1 == 0) {
gpio_direction_output(0x29,0);
}
iVar1 = gpio_request(0x2c,s_DAC_Mute_804fb7b0);
if (iVar1 == 0) {
gpio_direction_output(0x2c,0);
}
iVar1 = gpio_request(0x26,s_Analog_power_804fb7bc);
if (iVar1 == 0) {
gpio_direction_output(0x26,0);
}
iVar1 = gpio_request(0x25,s_out_sel_804fb7cc);
if (iVar1 == 0) {
gpio_direction_output(0x25,0);
}
iVar1 = gpio_request(0x2f,s_out_mute_804fb7d4);
if (iVar1 == 0) {
gpio_direction_output(0x2f,1);
}
iVar1 = gpio_request(0x35,s_spdif_en_804fb7e0);
if (iVar1 == 0) {
gpio_direction_output(0x35,0);
}
return iVar1;
}And the fact that apparently we have jzmmc_v1.2:
Code: [Select]
s_jzmmc_v1.2_804b8c6c XREF[1]: 80513d10(*)
804b8c6c 6a 7a 6d ds "jzmmc_v1.2"
6d 63 5f
76 31 2e
10
Starting Development and Compiling / Re: Beginning steps in kernel disassembly and analysis
« Last post by dconrad on June 22, 2021, 11:11:36 PM »In the same vein, here's some ring key structs built from arch/mips/xburst/soc-x1000/chip-x1000/idriver/common/sa_keypad_ring.h. A lot (not all) of this idriver stuff seems to be applicable:
Code: [Select]
ring_keys_platform_data_8050fd38 XREF[1]: 8050f830(*)
8050fd38 68 fd 50 ring_key
80 02 00
00 00 00
8050fd38 68 fd 50 80 addr ring_keys_button_8050f *buttons = XREF[1]: 8050f830(*)
8050fd3c 02 00 00 00 int 2h nbuttons
8050fd40 00 00 00 00 uint 0h poll_interval
8050fd44 00 00 00 00 uint:1 0h rep:1
8050fd48 64 00 00 00 uint 64h timer_debounce
8050fd4c 37 00 00 00 int 37h ring1_gpio
8050fd50 38 00 00 00 int 38h ring2_gpio
8050fd54 00 00 00 00 addr 00000000 *enable
8050fd58 00 00 00 00 addr 00000000 *disable
8050fd5c 00 00 00 00 char * 00000000 *name
DAT_8050fd60 XREF[1]: 8050fd2c(*)
8050fd60 00 ?? 00h
8050fd61 00 ?? 00h
8050fd62 00 ?? 00h
8050fd63 00 ?? 00h
8050fd64 84 ?? 84h ? -> 804b7384
8050fd65 73 ?? 73h s
8050fd66 4b ?? 4Bh K
8050fd67 80 ?? 80h
ring_keys_button_8050fd68 XREF[1]: 8050fd38(*)
8050fd68 69 00 00 ring_key
00 c0 73
4b 80 02
8050fd68 69 00 00 00 uint 69h code XREF[1]: 8050fd38(*)
8050fd6c c0 73 4b 80 char * s_ring_left_804b73c0 *desc = "ring left"
8050fd70 02 00 00 00 int 2h direction
8050fd74 00 00 00 00 int 0h wakeup
8050fd78 00 00 00 00 bool FALSE can_disable
8050fd7c 6a 00 00 ring_key
00 cc 73
4b 80 01
8050fd7c 6a 00 00 00 uint 6Ah code
8050fd80 cc 73 4b 80 char * s_ring_right_804b73cc *desc = "ring right"
8050fd84 01 00 00 00 int 1h direction
8050fd88 00 00 00 00 int 0h wakeup
8050fd8c 00 00 00 00 bool FALSE can_disable
DAT_8050fd90 XREF[1]: FUN_802c2dd4:802c2fcc(*)
8050fd90 39 ?? 39h 9
8050fd91 00 ?? 00h
8050fd92 01 ?? 01h
8050fd93 00 ?? 00h