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I've been thinking about this SD NAND bridge. There must be a way to disable the bridge because the TCC770 needs to be able to talk with the NAND directly when it boots. There is no way the TCC770 can boot via SD (that I can tell).
Very interesting. I think the next step now is find some way of monitoring the boot sequence of a NAND and HARP m200, and comparing the results.
Might be a good idea to look for differences in the startup code between the v1/2/3.xx firmwares?
This tells me that the tcc770 is booting off of EEPROM. Anyone know anything about this? If this is true then the tcc770 may be going right from EEPROM to SD in the boot process and the NAND may not be tied directly to the tcc770. I looked at the board and did see a 10 pin part marked "SCTI AIP" that could be a EEPROM
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