Rockbox Ports are now being developed for various digital audio players!
diff -ruN rockbox/apps/plugins/plugin.lds rockbox_/apps/plugins/plugin.lds--- rockbox/apps/plugins/plugin.lds 2021-11-30 23:15:20.509125218 +0300+++ rockbox_/apps/plugins/plugin.lds 2021-11-30 20:54:27.453792365 +0300@@ -7,7 +7,7 @@ #elif defined(CPU_ARM) OUTPUT_FORMAT(elf32-littlearm) #elif defined(CPU_MIPS)-OUTPUT_FORMAT(elf32-littlemips)+//OUTPUT_FORMAT("elf32-tradlittlemips") #else /* We can have an #error here we don't use this file when build sims! */ #error Unknown CPU architecture
diff -ruN rockbox/apps/plugins/plugins.make rockbox_/apps/plugins/plugins.make--- rockbox/apps/plugins/plugins.make 2021-11-30 23:15:20.509125218 +0300+++ rockbox_/apps/plugins/plugins.make 2021-11-30 22:22:04.738824749 +0300@@ -151,7 +151,7 @@ $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o $(BUILDDIR)/$*.elf \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(PLUGINLDFLAGS)+ $(LDGCC720) $(PLUGINLDFLAGS) $(SILENT)$(call objcopy,$(BUILDDIR)/$*.elf,$@) $(BUILDDIR)/apps/plugins/%.lua: $(ROOTDIR)/apps/plugins/%.lua@@ -161,4 +161,4 @@ $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o /dev/null \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(OVERLAYLDFLAGS)+ $(LDGCC720) $(OVERLAYLDFLAGS)
diff -ruN rockbox/lib/rbcodec/codecs/codecs.make rockbox_/lib/rbcodec/codecs/codecs.make--- rockbox/lib/rbcodec/codecs/codecs.make 2021-11-30 23:15:21.861145243 +0300+++ rockbox_/lib/rbcodec/codecs/codecs.make 2021-11-30 21:57:13.469772087 +0300@@ -212,11 +212,11 @@ $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*-pre.elf \ $(filter %.o, $^) \ $(filter-out $(CODECLIB),$(filter %.a, $+)) $(CODECLIB) \- -lgcc $(subst .map,-pre.map,$(CODECLDFLAGS))+ $(LDGCC720) $(subst .map,-pre.map,$(CODECLDFLAGS)) $(CODECDIR)/%.codec: $(CODECDIR)/%.o $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*.elf \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(CODECLDFLAGS)+ $(LDGCC720) $(CODECLDFLAGS) $(SILENT)$(call objcopy,$(CODECDIR)/$*.elf,$@)
diff -ruN rockbox/apps/debug_menu.c rockbox_/apps/debug_menu.c--- rockbox/apps/debug_menu.c 2021-11-30 23:15:20.099119145 +0300+++ rockbox_/apps/debug_menu.c 2021-11-29 22:48:18.561253304 +0300@@ -188,7 +188,7 @@ return simplelist_show_list(&info); } -#ifdef __linux__+#ifdef __linux__1 #include "cpuinfo-linux.h" #define MAX_STATES 16@@ -2588,7 +2588,7 @@ { "Catch mem accesses", dbg_set_memory_guard }, #endif { "View OS stacks", dbg_os },-#ifdef __linux__+#ifdef __linux__1 { "View CPU stats", dbg_cpuinfo }, #endif #if (CONFIG_BATTERY_MEASURE != 0) && !defined(SIMULATOR)
diff -ruN rockbox/firmware/drivers/i2c-async.c rockbox_/firmware/drivers/i2c-async.c--- rockbox/firmware/drivers/i2c-async.c 2021-11-30 23:15:21.026132875 +0300+++ rockbox_/firmware/drivers/i2c-async.c 2021-11-30 20:01:46.994213172 +0300@@ -396,3 +396,30 @@ return desc[1].arg; }++int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)+{+ return i2c_reg_write(bus, addr, reg, 1, &val);+}++int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)+{+ uint8_t v;+ int i = i2c_reg_read(bus, addr, reg, 1, &v);+ if(i == I2C_STATUS_OK)+ return v;+ else+ return -1;+}++int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,+ int bit, int value, uint8_t* val)+{+ uint8_t clr = 0, set = 0;+ if(value)+ set = 1 << bit;+ else+ clr = 1 << bit;++ return i2c_reg_modify1(bus, addr, reg, clr, set, val);+}
diff -ruN rockbox/firmware/export/i2c-async.h rockbox_/firmware/export/i2c-async.h--- rockbox/firmware/export/i2c-async.h 2021-11-30 23:15:21.085133749 +0300+++ rockbox_/firmware/export/i2c-async.h 2021-11-30 20:01:37.124067627 +0300@@ -247,35 +247,15 @@ uint8_t clr, uint8_t set, uint8_t* val); /* Variant to write a single 8-bit value to a register */-inline int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)-{- return i2c_reg_write(bus, addr, reg, 1, &val);-}+extern int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val); /* Variant to read an 8-bit value from a register; returns the value * directly, or returns -1 on any error. */-inline int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)-{- uint8_t v;- int i = i2c_reg_read(bus, addr, reg, 1, &v);- if(i == I2C_STATUS_OK)- return v;- else- return -1;-}+extern int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg); /* Variant to set or clear one bit in an 8-bit register */-inline int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,- int bit, int value, uint8_t* val)-{- uint8_t clr = 0, set = 0;- if(value)- set = 1 << bit;- else- clr = 1 << bit;-- return i2c_reg_modify1(bus, addr, reg, clr, set, val);-}+extern int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,+ int bit, int value, uint8_t* val); /* Internal API */
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/app.lds rockbox_/firmware/target/mips/ingenic_x1000/app.lds--- rockbox/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 23:15:21.417138667 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 20:38:02.948403179 +0300@@ -1,7 +1,7 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+//OUTPUT_FORMAT("elf32-tradlittlemips") OUTPUT_ARCH(MIPS) ENTRY(_start) STARTUP(target/mips/ingenic_x1000/crt0.o)
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 23:15:21.418138682 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 19:37:40.740889896 +0300@@ -340,6 +340,17 @@ jz_writef(CPM_CCR, CE_CPU(0), CE_AHB0(0), CE_AHB2(0)); } +uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)+{+ return (infreq + (outfreq - 1)) / outfreq;+}++uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)+{+ uint32_t div = clk_calc_div(infreq, outfreq);+ return __builtin_clz(div) ^ 31;+}+ void clk_set_ddr(x1000_clk_t src, uint32_t div) { /* Write new configuration */
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 23:15:21.418138682 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 19:38:01.519196158 +0300@@ -80,16 +80,9 @@ extern void clk_set_ddr(x1000_clk_t src, uint32_t div); /* Returns the smallest n such that infreq/n <= outfreq */-inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)-{- return (infreq + (outfreq - 1)) / outfreq;-}+extern uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq); /* Returns the smallest n such that (infreq >> n) <= outfreq */-inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)-{- uint32_t div = clk_calc_div(infreq, outfreq);- return __builtin_clz(div) ^ 31;-}+extern uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq); #endif /* __CLK_X1000_H__ */
diff -ruN rockbox/firmware/target/mips/ingenic_x1000/spl.lds rockbox_/firmware/target/mips/ingenic_x1000/spl.lds--- rockbox/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 23:15:21.424138771 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 20:38:26.213745184 +0300@@ -1,7 +1,7 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+//OUTPUT_FORMAT("elf32-tradlittlemips") OUTPUT_ARCH(MIPS) ENTRY(_spl_start) STARTUP(target/mips/ingenic_x1000/spl-start.o)
Second is LD from that GCC 7.2.0 does not accept inlined function in header. It leads to errors at linking stage.
*PANIC*Exception occurred: Coprocessor Unusable [0xf4fffdb1] at 0x83e027ac (stack at 0x80002838)
/usr/local/bin/mipsel-elf-objcopy -O binary /home/fix/rockbox/rockbox/build/apps/plugins/battery_bench.elf /home/fix/rockbox/rockbox/build/apps/plugins/battery_bench.rock
Try adding -msoft-float to your CFLAGS.
/home/users/ylli/ingenic_toolchain/project/src/gcc-7-2017.11/libgcc/soft-fp/mulsf3.c:(.text+0x84): relocation truncated to fit: R_MIPS_GOT16 against `.rodata'collect2: error: ld returned 1 exit status
/usr/local/mips-linux-gnu-ingenic-gcc7.2.0/bin/../lib/gcc/mips-linux-gnu/7.2.0/../../../../mips-linux-gnu/bin/ld: Warning: /home/fix/rockbox/rockbox/build5.2.0/lib/rbcodec/codecs/wma.elf uses -msoft-float (set by /home/fix/rockbox/rockbox/build5.2.0/lib/rbcodec/codecs/wma.o), /usr/local/mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a(_divdi3.o) uses -mhard-float
.text.stub.7 0x0000000083d07c20 0x10 linker stubs 0x0000000083d07c28 .pic.__mulsf3 .text 0x0000000083d07c30 0x10 /usr/local/mips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a(mulsf3.o) 0x0000000083d07c30 __mulsf3
Flags: 0x70001007, noreorder, pic, cpic, o32, mips32r2
Flags: 0x1001, noreorder, o32, mips1
. = .; _gp = ALIGN(16); .got ALIGN(4) : { *(.got.plt) *(.got) . = ALIGN(4) ; } > PLUGIN_RAM
Perhaps you should compare with the default linker scripts (shipped with the toolchain) for more hints?
--- rockbox/apps/plugins/plugin.lds 2021-11-30 23:15:20.509125218 +0300+++ rockbox_new/apps/plugins/plugin.lds 2021-12-14 22:22:27.354083567 +0300@@ -7,7 +7,11 @@ #elif defined(CPU_ARM) OUTPUT_FORMAT(elf32-littlearm) #elif defined(CPU_MIPS)+#ifdef GCC720+OUTPUT_FORMAT(elf32-tradlittlemips)+#else OUTPUT_FORMAT(elf32-littlemips)+#endif #else /* We can have an #error here we don't use this file when build sims! */ #error Unknown CPU architecture@@ -266,20 +270,51 @@ .rodata : {- *(.rodata*)+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) #if defined(IRAMSIZE) && IRAMSIZE == 0- *(.irodata)+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.irodata))) #endif } > PLUGIN_RAM-+#ifdef GCC720+ .got.plt : { *(.got.plt) }+#endif .data : {- *(.data*)+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.data*))) #if defined(IRAMSIZE) && IRAMSIZE == 0- *(.idata)+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.idata))) #endif } > PLUGIN_RAM +#ifdef GCC720+ . = .;+ . = .;+ HIDDEN (_gp = ALIGN (16) + 0x7ff0);+ .got : + { + *(.got) + } > PLUGIN_RAM+ /* We want the small data sections together, so single-instruction offsets+ can access them all, and initialized data all before uninitialized, so+ we can shorten the on-disk segment size. */+ .sdata :+ {+ *(.sdata .sdata.* .gnu.linkonce.s.*)+ } > PLUGIN_RAM+ .lit8 : { *(.lit8) }+ .lit4 : { *(.lit4) }+ _edata = .; PROVIDE (edata = .);+ . = .;+ __bss_start = .;+ _fbss = .;+ .sbss :+ {+ *(.dynsbss)+ *(.sbss .sbss.* .gnu.linkonce.sb.*)+ *(.scommon)+ } > PLUGIN_RAM+#endif+ #if NOCACHE_BASE != 0 .ncdata . + NOCACHE_BASE : {@@ -320,8 +355,20 @@ *(.ibss) #endif *(COMMON)+#ifdef GCC720+ /* Align here to ensure that the .bss section occupies space up to+ _end. Align after .bss to ensure correct alignment even if the+ .bss section disappears because there are no input sections.+ FIXME: Why do we need it? When there is no .bss section, we don't+ pad the .data section. */+ . = ALIGN(. != 0 ? 32 / 8 : 1);+#else . = ALIGN(0x4);+#endif } > PLUGIN_RAM+#ifdef GCC720+ . = ALIGN(32 / 8);+#endif #if NOCACHE_BASE != 0 .ncbss . + NOCACHE_BASE (NOLOAD) :
--- rockbox/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 23:15:21.424138771 +0300+++ rockbox_new/firmware/target/mips/ingenic_x1000/spl.lds 2021-12-12 19:41:03.927982128 +0300@@ -1,7 +1,11 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+#ifdef GCC720+OUTPUT_FORMAT(elf32-tradlittlemips)+#else+OUTPUT_FORMAT(elf32-littlemips)+#endif OUTPUT_ARCH(MIPS) ENTRY(_spl_start) STARTUP(target/mips/ingenic_x1000/spl-start.o)
--- rockbox/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 23:15:21.417138667 +0300+++ rockbox_new/firmware/target/mips/ingenic_x1000/app.lds 2021-12-13 21:23:24.324047688 +0300@@ -1,7 +1,11 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+#ifdef GCC720+OUTPUT_FORMAT(elf32-tradlittlemips)+#else+OUTPUT_FORMAT(elf32-littlemips)+#endif OUTPUT_ARCH(MIPS) ENTRY(_start) STARTUP(target/mips/ingenic_x1000/crt0.o)@@ -31,14 +35,14 @@ . = ALIGN(4); .rodata : {- *(.rodata*);+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))); } > DRAM . = ALIGN(4); .data : {- *(.data*);- *(.sdata*);+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.data*)));+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.sdata*))); } > DRAM .iram X1000_IRAM_BASE: AT (_bssbegin)
* DESCRIPTION : ** Linker script file ** ***************************************************************************/OUTPUT_FORMAT("elf32-tradlittlemips")OUTPUT_ARCH(mips)/**** Start point ****/ENTRY(_start) /* Entry point of application */MEMORY{ ram (wx) : ORIGIN = 0x80000000, LENGTH = 32M}SECTIONS{ /**** Code and read-only data ****/ .text 0x80100000 : { _ftext = ABSOLUTE(.) ; /* Start of code and read-only data */ *(.text*) *(.gnu.linkonce.*) *(__libc*) _ecode = ABSOLUTE(.) ; /* End of code */ *(.rodata*) . = ALIGN(8); _etext = ABSOLUTE(.); /* End of code and read-only data */ } > ram /**** Initialised data ****/ .data : { _fdata = ABSOLUTE(.); /* Start of initialised data */ *(.data*) *(.eh_frame*) *(.gcc_except_table*) . = ALIGN(8); __CTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.ctors*))) __CTOR_END__ = ABSOLUTE(.); __DTOR_LIST__ = ABSOLUTE(.); KEEP(*(SORT(.dtors*))) __DTOR_END__ = ABSOLUTE(.); _gp = ABSOLUTE(. + 0x7ff0); /* Base of small data */ *(.lit8) *(.lit4) *(.sdata) . = ALIGN(8); _edata = ABSOLUTE(.); /* End of initialised data */ } > ram /**** Uninitialised data ****/ _fbss = .; /* Start of uninitialised data */ .sbss : { *(.sbss) *(.scommon) } .bss : { *(.bss) *(COMMON) /* Allocate room for stack */ . = ALIGN(8) ; _freemem = .; } _end = . ; /* End of unitialised data */ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } /DISCARD/ : { *(.reginfo) } PROVIDE(etext = _etext); PROVIDE (edata = .); PROVIDE (end = .);}
I tried to use Ingenic MIPS GCC 5.2.0 Toolchain but I gave up with non resolved many of "relocation truncated to fit: R_MIPS_GOT16 against ..." errors. It looked like bunutils problem.Then I searched anything newer and found Ingenic MIPS Toolchain on FTP. Direct link: ftp://ftp.ingenic.cn/Ingenic-MIPS-Toolchain/releases/ingenic-mips-toolchain-r5.0.4/latest has date stump Oct 13, 2021 Mirror https://www.mediafire.com/folder/7x0zksrlh8d3r/Ingenic_MIPS_ToolchainSo I tried to use Ingenic MIPS GCC 7.2.0 Toolchain (mips-linux-gnu-ingenic-gcc7.2.0-glibc2.29-fp32-r5.0.4.tar.bz2) to compile m3k native port. It supports "-march=xburst" flag BTWI had few problems with compiling but all has been resolved. First is changing to OUTPUT_FORMAT("elf32-tradlittlemips") in *.lds or removing that string at all.inshot para pc gratisSecond is LD from that GCC 7.2.0 does not accept inlined function in header. It leads to errors at linking stage.Third is again "relocation truncated to fit: R_MIPS_GOT16 against ..." caused by "-lgcc" flags in app/plugins/plugins.make and libs/rbcodec/codecs/codecs.makesome codecs build failed so I just changed "-lgcc" in link command tomips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/libgcc.a (for two particular compiling failed situation)andmips-linux-gnu-ingenic-gcc7.2.0/lib/gcc/mips-linux-gnu/7.2.0/soft-float/libgcc.a (for other files)for added $(LDGCC720)Code: [Select]diff -ruN rockbox/apps/plugins/plugin.lds rockbox_/apps/plugins/plugin.lds--- rockbox/apps/plugins/plugin.lds 2021-11-30 23:15:20.509125218 +0300+++ rockbox_/apps/plugins/plugin.lds 2021-11-30 20:54:27.453792365 +0300@@ -7,7 +7,7 @@ #elif defined(CPU_ARM) OUTPUT_FORMAT(elf32-littlearm) #elif defined(CPU_MIPS)-OUTPUT_FORMAT(elf32-littlemips)+//OUTPUT_FORMAT("elf32-tradlittlemips") #else /* We can have an #error here we don't use this file when build sims! */ #error Unknown CPU architectureCode: [Select]diff -ruN rockbox/apps/plugins/plugins.make rockbox_/apps/plugins/plugins.make--- rockbox/apps/plugins/plugins.make 2021-11-30 23:15:20.509125218 +0300+++ rockbox_/apps/plugins/plugins.make 2021-11-30 22:22:04.738824749 +0300@@ -151,7 +151,7 @@ $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o $(BUILDDIR)/$*.elf \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(PLUGINLDFLAGS)+ $(LDGCC720) $(PLUGINLDFLAGS) $(SILENT)$(call objcopy,$(BUILDDIR)/$*.elf,$@) $(BUILDDIR)/apps/plugins/%.lua: $(ROOTDIR)/apps/plugins/%.lua@@ -161,4 +161,4 @@ $(call PRINTS,LD $(@F))$(CC) $(PLUGINFLAGS) -o /dev/null \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(OVERLAYLDFLAGS)+ $(LDGCC720) $(OVERLAYLDFLAGS)Code: [Select]diff -ruN rockbox/lib/rbcodec/codecs/codecs.make rockbox_/lib/rbcodec/codecs/codecs.make--- rockbox/lib/rbcodec/codecs/codecs.make 2021-11-30 23:15:21.861145243 +0300+++ rockbox_/lib/rbcodec/codecs/codecs.make 2021-11-30 21:57:13.469772087 +0300@@ -212,11 +212,11 @@ $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*-pre.elf \ $(filter %.o, $^) \ $(filter-out $(CODECLIB),$(filter %.a, $+)) $(CODECLIB) \- -lgcc $(subst .map,-pre.map,$(CODECLDFLAGS))+ $(LDGCC720) $(subst .map,-pre.map,$(CODECLDFLAGS)) $(CODECDIR)/%.codec: $(CODECDIR)/%.o $(call PRINTS,LD $(@F))$(CC) $(CODECFLAGS) -o $(CODECDIR)/$*.elf \ $(filter %.o, $^) \ $(filter %.a, $+) \- -lgcc $(CODECLDFLAGS)+ $(LDGCC720) $(CODECLDFLAGS) $(SILENT)$(call objcopy,$(CODECDIR)/$*.elf,$@)that nasty hack, I shamedCode: [Select]diff -ruN rockbox/apps/debug_menu.c rockbox_/apps/debug_menu.c--- rockbox/apps/debug_menu.c 2021-11-30 23:15:20.099119145 +0300+++ rockbox_/apps/debug_menu.c 2021-11-29 22:48:18.561253304 +0300@@ -188,7 +188,7 @@ return simplelist_show_list(&info); } -#ifdef __linux__+#ifdef __linux__1 #include "cpuinfo-linux.h" #define MAX_STATES 16@@ -2588,7 +2588,7 @@ { "Catch mem accesses", dbg_set_memory_guard }, #endif { "View OS stacks", dbg_os },-#ifdef __linux__+#ifdef __linux__1 { "View CPU stats", dbg_cpuinfo }, #endif #if (CONFIG_BATTERY_MEASURE != 0) && !defined(SIMULATOR)Code: [Select]diff -ruN rockbox/firmware/drivers/i2c-async.c rockbox_/firmware/drivers/i2c-async.c--- rockbox/firmware/drivers/i2c-async.c 2021-11-30 23:15:21.026132875 +0300+++ rockbox_/firmware/drivers/i2c-async.c 2021-11-30 20:01:46.994213172 +0300@@ -396,3 +396,30 @@ return desc[1].arg; }++int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)+{+ return i2c_reg_write(bus, addr, reg, 1, &val);+}++int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)+{+ uint8_t v;+ int i = i2c_reg_read(bus, addr, reg, 1, &v);+ if(i == I2C_STATUS_OK)+ return v;+ else+ return -1;+}++int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,+ int bit, int value, uint8_t* val)+{+ uint8_t clr = 0, set = 0;+ if(value)+ set = 1 << bit;+ else+ clr = 1 << bit;++ return i2c_reg_modify1(bus, addr, reg, clr, set, val);+}Code: [Select]diff -ruN rockbox/firmware/export/i2c-async.h rockbox_/firmware/export/i2c-async.h--- rockbox/firmware/export/i2c-async.h 2021-11-30 23:15:21.085133749 +0300+++ rockbox_/firmware/export/i2c-async.h 2021-11-30 20:01:37.124067627 +0300@@ -247,35 +247,15 @@ uint8_t clr, uint8_t set, uint8_t* val); /* Variant to write a single 8-bit value to a register */-inline int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val)-{- return i2c_reg_write(bus, addr, reg, 1, &val);-}+extern int i2c_reg_write1(int bus, uint8_t addr, uint8_t reg, uint8_t val); /* Variant to read an 8-bit value from a register; returns the value * directly, or returns -1 on any error. */-inline int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg)-{- uint8_t v;- int i = i2c_reg_read(bus, addr, reg, 1, &v);- if(i == I2C_STATUS_OK)- return v;- else- return -1;-}+extern int i2c_reg_read1(int bus, uint8_t addr, uint8_t reg); /* Variant to set or clear one bit in an 8-bit register */-inline int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,- int bit, int value, uint8_t* val)-{- uint8_t clr = 0, set = 0;- if(value)- set = 1 << bit;- else- clr = 1 << bit;-- return i2c_reg_modify1(bus, addr, reg, clr, set, val);-}+extern int i2c_reg_setbit1(int bus, uint8_t addr, uint8_t reg,+ int bit, int value, uint8_t* val); /* Internal API */ Code: [Select]diff -ruN rockbox/firmware/target/mips/ingenic_x1000/app.lds rockbox_/firmware/target/mips/ingenic_x1000/app.lds--- rockbox/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 23:15:21.417138667 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/app.lds 2021-11-30 20:38:02.948403179 +0300@@ -1,7 +1,7 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+//OUTPUT_FORMAT("elf32-tradlittlemips") OUTPUT_ARCH(MIPS) ENTRY(_start) STARTUP(target/mips/ingenic_x1000/crt0.o)Code: [Select]diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 23:15:21.418138682 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.c 2021-11-30 19:37:40.740889896 +0300@@ -340,6 +340,17 @@ jz_writef(CPM_CCR, CE_CPU(0), CE_AHB0(0), CE_AHB2(0)); } +uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)+{+ return (infreq + (outfreq - 1)) / outfreq;+}++uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)+{+ uint32_t div = clk_calc_div(infreq, outfreq);+ return __builtin_clz(div) ^ 31;+}+ void clk_set_ddr(x1000_clk_t src, uint32_t div) { /* Write new configuration */Code: [Select]diff -ruN rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h--- rockbox/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 23:15:21.418138682 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/clk-x1000.h 2021-11-30 19:38:01.519196158 +0300@@ -80,16 +80,9 @@ extern void clk_set_ddr(x1000_clk_t src, uint32_t div); /* Returns the smallest n such that infreq/n <= outfreq */-inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)-{- return (infreq + (outfreq - 1)) / outfreq;-}+extern uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq); /* Returns the smallest n such that (infreq >> n) <= outfreq */-inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)-{- uint32_t div = clk_calc_div(infreq, outfreq);- return __builtin_clz(div) ^ 31;-}+extern uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq); #endif /* __CLK_X1000_H__ */Code: [Select]diff -ruN rockbox/firmware/target/mips/ingenic_x1000/spl.lds rockbox_/firmware/target/mips/ingenic_x1000/spl.lds--- rockbox/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 23:15:21.424138771 +0300+++ rockbox_/firmware/target/mips/ingenic_x1000/spl.lds 2021-11-30 20:38:26.213745184 +0300@@ -1,7 +1,7 @@ #include "config.h" #include "cpu.h" -OUTPUT_FORMAT("elf32-littlemips")+//OUTPUT_FORMAT("elf32-tradlittlemips") OUTPUT_ARCH(MIPS) ENTRY(_spl_start) STARTUP(target/mips/ingenic_x1000/spl-start.o)
Also found this linker script from jz4730 sources with similar "trick" for small data.-....
But also I'd like to build with new mips-linux-gnu-ingenic-gcc7.2.0-glibc2.29-fp32-r5.1.3 toolchain... with xburst march and latest optimizations suppport....Perhaps the new optimizations will help to load/utilize cpu/chip more effectively with less battery drain and generally make the ui more responsive. Anyway is a good idea to build it with latest toolchain
[...] Anyway is a good idea to build it with latest toolchain
I confirm that the toolchain mips-linux-gnu-ingenic-gcc7.2.0-glibc2.29-fp32-r5.0.4 does not automatically generate code with specific xburst SIMD instructions and optimizations. You need to change source code of codecs and decoders with using specific SIMD assembly instructions (MXU).I reffer to this .....
Using the latest GCC won't make things appreciably faster or more responsive. You could expect a few percent performance improvement, at most, which at best will translate to a few percent better battery life. Poor UI performance is likely due to slow I/O or slow algorithms, and a newer compiler won't fix either of those problems. The only case I can think of where shaving a few percent off CPU time might make a difference is heavy EQ use at high sample rates (above 96 KHz).Upgrading the compiler may also break things -- newer compilers are far more aggressive at taking advantage .....
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