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32MB Fuze V1, Checksum error

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ranma:
I've only used openocd for JTAG so far, but it worked well for me (using a FT2232 board for the JTAG interface).  What kind of parallel JTAG interface did you get? Is it 3V compatible?
For openocd something like http://www.rockbox.org/wiki/pub/Main/SansaAMSJTAG/openocd.cfg
should work, but you'll have to change the interface settings to those required for your parallel interface.

Also, usually if you upgrade the RAM with one of bigger size it generally should work with the old rams settings (but you don't get the bigger size until you've switched to updated settings). If you get checksum errors that's an indication that maybe the ram isn't compatible after all or you've got some bad soldering joints.

For example, on my WRT54GL I replaced the original 16MB ram chip with a compatible 64MB ram chip and it will boot just fine (though in 16MB mode) directly after the upgrade, with the old ram settings.  Then, after flashing the new settings and rebooting I had 64MB of ram.

sss:
The JTAG cable is the one from this auction: http://cgi.ebay.com/PC-JTAG-Programmer-Adapter-Debugger-w-JTAG-Cable-New-/250637375168?pt=LH_DefaultDomain_0&hash=item3a5b26d6c0 .  It is supposed to adapt to the target voltage.

Regarding the settings here: http://www.rockbox.org/wiki/pub/Main/SansaAMSJTAG/openocd.cfg , I found those yesterday and tried them in openocd for linux (debian version from repository). Here is my config:

--- Code: ---telnet_port 4444
gdb_port 3333

interface parport
parport_port 0
parport_cable arm-jtag #have already tried wiggler and wiggler_ntrst_inverted settings here
jtag_khz 6000
##use combined on interfaces or targets that can't set TRST/SRST separately <-Tried the below setting, didn't seem to help
#reset_config trst_and_srst srst_pulls_trst

jtag_ntrst_delay 100

set _CHIPNAME as3525
set _ENDIAN little
set _CPUTAPID 0x00922f0f

jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
$_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1

--- End code ---

ranma:

--- Quote from: sss on September 15, 2010, 10:44:08 AM ---The JTAG cable is the one from this auction: http://cgi.ebay.com/PC-JTAG-Programmer-Adapter-Debugger-w-JTAG-Cable-New-/250637375168?pt=LH_DefaultDomain_0&hash=item3a5b26d6c0 .  It is supposed to adapt to the target voltage.

--- End quote ---

Hmm, judging from the picture it's just using a 74hc244 octal tri-state line driver/buffer, which is not a proper level-shifter AFAICS.
It may still work though...


--- Quote from: sss on September 15, 2010, 10:44:08 AM ---Regarding the settings here: http://www.rockbox.org/wiki/pub/Main/SansaAMSJTAG/openocd.cfg , I found those yesterday and tried them in openocd for linux (debian version from repository). Here is my config:

--- Code: ---interface parport
parport_port 0
parport_cable arm-jtag #have already tried wiggler and wiggler_ntrst_inverted settings here

--- End code ---

--- End quote ---

The question here is, was there accompanying documentation of the jtag signal to parallel port pin mapping?
If you're unlucky you'll have to edit the openocd source to add the specific mapping and recompile...

sss:

--- Quote from: ranma on September 15, 2010, 04:03:22 PM ---Hmm, judging from the picture it's just using a 74hc244 octal tri-state line driver/buffer, which is not a proper level-shifter AFAICS.
It may still work though...

--- End quote ---

I noticed the simple design and figured it was just another instance of the Chinese using common chips in unusual ways to fit needs.  They do that a lot.  Reminds me of the Chinese flashlights that use more LEDs to make up for a lack of proper current regulation.

ranma:
BTW, comparing
http://www.frozeneskimo.com/electronics/wp-content/uploads/Schematics/jtagwigglersch.png
and the pic in the auction you linked to I'd say your interface is most likely wiggler compatible.

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