Rockbox Development > New Ports
SanDisk Sansa c200v2, m200v4, clipv1, clipv2, clip+, and fuzev2
kugel.:
--- Quote from: RockRabbit on December 17, 2008, 04:12:38 PM ---Point taken about the power button - I will try to find it. However, am currently waiting till I get a datasheet before doing any more hacking. I have requested one so hopefully wont be long now till I can get things moving. In the meantime I will investigate the main ROckbox code and see what I can pick up about how it works.
Most of my life ive worked in IT writing software, usually for large companies. I have to say that doing Rockbox is a thousand times more interesting and satisfying. The pay is'nt as good, but there is lots of job satisfaction and how often do you get to listen to your code? Would'nt it be great if the Rockbox hardware could get made too?
--- End quote ---
I have a datasheet. If you want to know something I can give you some information. Also, our Rockbox source code is a fine source of information already.
The base addresses of the GPIO ports:
GPIOA_BASE 0xC80B0000
GPIOB_BASE 0xC80C0000
GPIOC_BASE 0xC80D0000
GPIOD_BASE 0xC80E0000
You can read each pin using this formula:
GPIOx_BASE+(1<<(X+2))
where X is your pin and x A, B, C or D (the signficant pins are PAD_ADDR[9:2], that's why the +2).
To set pins use the mentioned formula and do
GPIOx_BASE+(1<<(X+2)) = (1<<X)
To clear just
GPIOx_BASE+(1<<(X+2)) = 0
You can set/clear GPIOx_DIR for pins using this
GPIOx_BASE+0x400 = (1<<7|..)
I hope this gets you somewhere until you have the datasheet.
RockRabbit:
Thanks hugel.
But could you explain what you mean by BASE and DIR?
kugel.:
GPIOx_BASE just stands for the base adress, i.e. the starting address of a port.
DIR (stands for direction), as already said, decides whether a pin is configured as output or input. output means we can safely write to it (with our software), input means the hardware can safely write to it.
RockRabbit:
If i address a GPIO pin using the code "ldr r1, [r0, #0x8] " where r0 has the base address of the IO port A, am I right in thinking that this is pin A1? Similarly would "ldr r1, [r0, #0x10] " be A2?
Also, I notice that some of the pins seem to detect on bit unset (0), others on bit set (non zero). Is this normal?
I notice that in the hardware mappings twiki, no mention is made of which logic level is used for each port/button combination. Is that becuase it is not necessary or because I have got confused somewhere?
Thanks, :o
kugel.:
--- Quote ---If i address a GPIO pin using the code "ldr r1, [r0, #0x8] " where r0 has the base address of the IO port A, am I right in thinking that this is pin A1? Similarly would "ldr r1, [r0, #0x10] " be A2?
--- End quote ---
This is true. And Pin 7 is (1<<7+2) -> (1<<9) -> 512 -> 0x200. I think you got it now :)
--- Quote ---Also, I notice that some of the pins seem to detect on bit unset (0), others on bit set (non zero). Is this normal?
--- End quote ---
Yes, the states at boot up don't have to be the same for all pins.
--- Quote ---Is that becuase it is not necessary or because I have got confused somewhere?
--- End quote ---
I don't know. Probably the creator haven't thought of it (maybe because he didn't have enough inforomation at that time) when he created it.
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