Rockbox Development > New Ports
SanDisk Sansa c200v2, m200v4, clipv1, clipv2, clip+, and fuzev2
atomikpunk:
--- Quote ---*puts nose in big book*
--- End quote ---
Don't read it too fast like I did ;D (it was too easy)
MarcGuay:
--- Quote from: atomikpunk on September 17, 2008, 12:14:09 PM ---And after re-reading some docs on Daniel's site, I found out that v1 e200 players used the SD interface for the (primary) flash. So well I'll invest more time now on the SD interface as it seems to be the most promising avenue at the moment.
--- End quote ---
I can't tell if this has been confirmed yet but the chip in the bottom right of this photo:
Looks like a newer version of the SD controller in the e200v1's:
and the SD c100's
atomikpunk:
Well on the clip there doesn't seem to be any "translation" chip on the PCB, though I suspect it to be inserted in the AMS SoC. In fact, you will notice that the SoC is labelled with Sandisk markings so I suspect that Sandisk bought the AMS die, and added some more logic to it to support SD-interfaced NANDs. Which would in fact also explain the "spare registers for metal ECO redesign" usage...
Any comments on that? Anyone with experience in dies and chip customization?
daniel_at:
Just wanted to note: the term 'eco' (as you have found in the datasheet in conjunction with the sd-access) ppbl. stand for engineering change order - so it is indeed _very_ likely that sansa has added some more logic into the SoC.
http://en.wikipedia.org/wiki/Engineering_Change_Order
Daniel
funman:
Hi
I noticed OF will set the bit2 of the CCU_SPARE1 register if C1 pin reads #1, and clear the same bit2 if C1 reads #0, probably C1 is #1 when the SD-NAND interface chip is present.
On the Clip C1 was #1 when I tried it, could you check the value on E200 ?
EDIT: The exact same code is used in the e200 firmware (read C1, store the value in ram (the offset where the first nand/sd structure is stored - #8, use this value to clear/set the bit in the spare register).
However as fragilematter showed here C1 is #0 , maybe because the chip used in the e200 and the clip is different ?
Maybe with good eyes you can also see if there is a connection between C1 and a chip near the NAND ?
Mine are too weak to notice anything on the little Clip (and we didn't find any visible SD chip anyway)
EDIT2: I posted a patch on FS#9396 which uses a stage2 written in C.
I hope it attracts more hackers and make our code less error prone ;)
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