Rockbox Development > New Ports
SanDisk Sansa c200v2, m200v4, clipv1, clipv2, clip+, and fuzev2
funman:
I had some problems with SD yesterday: I played around with the plugins and some would randomly crash, sometimes with undefined instructions.
I suppose we don't properly check if a transfer was successful or not, when writing works it will be easier to use test_disk plugin.
For the sound I had tried the definitions of i2c registers in as3531 datasheet without luck, there was not much difference with as3514 (the mute bit for headphones is shifted by one).
About CGU_PERI, I have no idea right now : perhaps the bits give some status ? Something like "clock is now stable".. I suppose we'll find the explanation in the OF
EDIT: it seems bits 1:0 are never set, perhaps it assumes PLLA as source ?
We could check by either using only PLLB, or measuring the speed of some peripheral ?
EDIT2: the LCD doesn't use DBOP so we need to find another peripheral
FlynDice:
re: PCLK source
This gets set in line 301 0f system-as3525.c as AS3525_PCLK_SEL. Instead of using the macro I tried setting this to both 1 for PLLA and 3 for FCLK and when the player booted up in the debug page it showed b1:0 of CGU_PERI as both being 0.
ranma:
funman:
I had a look at recording. It seems to fault and the fault handler itself is faulting in memset16, called from lcd_clear_viewport. The memset16 disassembly looks like every 4th word was overwritten with zeroes:
This is what it's supposed to look like
--- Code: ---30200f08 <memset16>:
30200f08: e3100002 tst r0, #2 ; 0x2
30200f0c: 13520000 cmpne r2, #0 ; 0x0
30200f10: 10c010b2 strneh r1, [r0], #2
30200f14: 12422001 subne r2, r2, #1 ; 0x1
30200f18: e1811801 orr r1, r1, r1, lsl #16
30200f1c: e1a03001 mov r3, r1
30200f20: e3520008 cmp r2, #8 ; 0x8
30200f24: ba00000f blt 30200f68 <memset16+0x60>
30200f28: e52de004 str lr, [sp, -#4]!
30200f2c: e1a0c001 mov ip, r1
30200f30: e1a0e001 mov lr, r1
30200f34: e2522020 subs r2, r2, #32 ; 0x20
30200f38: a8a0500a stmgeia r0!, {r1, r3, ip, lr}
30200f3c: a8a0500a stmgeia r0!, {r1, r3, ip, lr}
30200f40: a8a0500a stmgeia r0!, {r1, r3, ip, lr}
30200f44: a8a0500a stmgeia r0!, {r1, r3, ip, lr}
--- End code ---
And this is the actual disassembly:
--- Code: ---> arm disassemble 0x30200f08 16
0x30200f08 0xe3100002 TST r0, #0x2
0x30200f0c 0x13520000 CMPNE r2, #0x0
0x30200f10 0x00000000 ANDEQ r0, r0, r0
0x30200f14 0x12422001 SUBNE r2, r2, #0x1
0x30200f18 0xe1811801 ORR r1, r1, r1, LSL #0x10
0x30200f1c 0xe1a03001 MOV r3, r1
0x30200f20 0x00000000 ANDEQ r0, r0, r0
0x30200f24 0xba00000f BLT 0x30200f68
0x30200f28 0xe52de004 STR r14, [r13, #-0x4]!
0x30200f2c 0xe1a0c001 MOV r12, r1
0x30200f30 0x00000000 ANDEQ r0, r0, r0
0x30200f34 0xe2522020 SUBS r2, r2, #0x20
0x30200f38 0xa8a0500a STMGE r0!, {r1, r3, r12, r14}
0x30200f3c 0xa8a0500a STMGE r0!, {r1, r3, r12, r14}
0x30200f40 0x00000000 ANDEQ r0, r0, r0
0x30200f44 0xa8a0500a STMGE r0!, {r1, r3, r12, r14}
--- End code ---
[edit]
Getting hotter:
The triggering function seems to be enc_set_parameters() in apps/recorder/pcm_record.c
Explains the overwrite pattern:
It initializes chunk->flags with 0, struct enc_chunk_hdr just so happens to be 4 words. :)
[/edit]
pbxy:
--- Quote from: funman on March 14, 2010, 04:59:00 PM ---It'd be nice to know if this code also works on Clipv2
--- End quote ---
Using r25204 the main binary finally loads successfully. :)
Some buttons don't work: left, down, hold, vol up.
http://www.imagebanana.com/img/j61f6av2/happyclipv2.jpg
Great work! Thank you a lot! :D
Edit: Yes, FM is detected!
funman:
Nice! Is the FM detected? (you should have the FM menu entry if it was)
About the buttons perhaps modifying the button driver like the Clipv1 would help: read only 1 row at each tick, and prepare the next row to be read at the next tick. Can you look at it ?
Not sure why hold button doesn't work though.
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