Rockbox Development > New Ports
SanDisk Sansa c200v2, m200v4, clipv1, clipv2, clip+, and fuzev2
saratoga:
I quickly double checked the posted JTAG pinout against the pins in the datasheet using a scan of the clip's board (you can actually see the JTAG traces go from the CPU to the header) and they looked right to me. Though you're welcome to double check me:
(First row is A, First column is 1)
C2 jtag_trst_n JTAG reset not
A1 jtag_tms JTAG mode select
B2 jtag_tck JTAG clock
B1 jtag_tdi JTAG data input
D3 jtag_tdo JTAG data output
beambot:
Sorry to ask again, but I would like to be sure !!!
Early in this thread some one posted a picture of the clip's board :
If I take JTAG nSRST (Header Pin7) as a reference because this is the only one which works ;) and take a look to the AS3525A Package Ball out I found it named M2. If I count backwards looking at the picture my proc pin candidates which are going to the jtag header are A1 A2 B1 B2 C3 (TMS,XPC7,TDI,TCK,TRST_N). So for my point of view not all neccessary JTAG pins are present at the 'header'. But it makes no sence to put only a few of the JTAG pins to the header, so I guess something is wrong with my counting. Give me a tip . Perhaps I'm not able to count ;D
Michael
daniel_at:
@beambot: try to look at the surrounding of the jtag-interface, if you find a unsolderd resistor or anything else, that can be bridged while facturing and then removed.
I found something like that within my E200v2 - but i have not tried to bridge it so far.
Picture: http://flickr.com/photos/90053035@N00/2494642819/in/set-72157605072639496/
bye, Daniel
atomikpunk:
Hi,
I've just put up some more findings on the library loading routines on the wiki. Please have a look here. As a summary, I am now pretty sure that library blocks are loaded in RAM directly by code in the firmware. I also noted that the library blocks size seems to be hardcoded in the firmware and would be 0x1E000 as expected.
If you feel like looking at the firmware, feel free to contact me via PMs and/or look at the wiki and try to expand knowledge in the area of the library loading routines. Or maybe have a look around the loading of the sd_reload, usb_function and otg_function libraries to try to find recovery procedures or stuff that trigs usb modes.
I hope we get to find a recovery procedure soon because there are a lot of things I'd like to test ;D
embrion:
Quiet risky method of recovery in case somthing goes wrong with bootloader but luckly it's one-or-two-times-in-device-life operation so no big deal.
However, in early developing stage, jtag would be usefull for debricking while developing the bootloader. It's perfect interface but as far as I know, we need some dedicated software to control it ( unless it works with hyperterminal and got "load FW image from TFTP server" option ;) )
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