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questions about jtag/bdm

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LinusN:
A small question: how will you modify the design to handle 1.8V levels?

threepointone:
Sorry, I honestly haven't thought of that. I thought I/O was supposed to be 3.3V on the scf5250, while the core was 1.8V, but I assume they might have used the same voltage to remove the need for another regulator.

I'm using this BDM to make an entirely new DAP, and since the first version isn't exactly portable the I/O was going to be 3.3V, which isn't a problem for this programmer.

[edit]
I just checked the P&E website, and it seems that the coldfire bdm they have is also 3.3V. The SCF5250 also lists the minimum I/O voltage at 3.0V. I actually lost my h340 a while ago :( so I can't check it myself, but is the H3xx I/O voltage really 1.8V? Or is there some BDM line that needs to be at core voltage, 1.8V?

[edit again]
if it's necessary, maxim has an application note on this:
http://www.maxim-ic.com/appnotes.cfm/an_pk/3498
Maxim also has a bunch of ICs dedicated to logic level translation:
http://para.maxim-ic.com/cache/en/results/5043.html
TI and other manufacturers probably also have some, but I haven't gotten to check yet. If 1.8V interfacing turns out to be necessary, the logic IC (74VHC14) could be replaced by a single logic transceiver chip, simplifying and improving the design at the same time. In fact, I'll probably do that for my first BDM--I should be able to get things ready for actual testing in a week or two. If I have time, I'll post (preliminary) updated schematics sometime later this week

LinusN:
My bad. You are right, the I/O is 3.3V on the 5250. I wonder what made me think otherwise. Maybe I'm getting old...  :)

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