Rockbox Ports are now being developed for various digital audio players!
/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * $Id$ * * Driver for WM8758 audio codec - based on datasheet for WM8983 * * Based on code from the ipodlinux project - http://ipodlinux.org/ * Adapted for Rockbox in December 2005 * * Original file: linux/arch/armnommu/mach-ipod/audio.c * * Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/#include "system.h"#include "kernel.h"#include "string.h"#include "audio.h"#include "wmcodec.h"#include "audiohw.h"#include "sound.h"/* shadow registers */static unsigned short eq1_reg = EQ1_EQ3DMODE | EQ_GAIN_VALUE(0);static unsigned short eq5_reg = EQ_GAIN_VALUE(0);/* convert tenth of dB volume (-89..6) to master volume register value */static int vol_tenthdb2hw(int db){ /* att DAC AMP result +6dB 0 +6 96 0dB 0 0 90 -57dB 0 -57 33 -58dB -1 -57 32 -89dB -32 -57 1 -90dB -oo -oo 0 */ if (db <= -900) { return 0; } else { return db / 10 - -90; }}/* helper function that calculates the register setting for amplifier and DAC volume out of the input from tenthdb2master() */static void get_volume_params(int db, int *dac, int *amp){ /* should never happen, set max volume for amp and dac */ if (db > 96) { *dac = 255; *amp = 63; } /* set dac to max and set volume for amp (better snr) */ else if (db > 32) { *dac = 255; *amp = (db-90)+57; } /* set amp to min and reduce dac output */ else if (db > 0) { *dac = (db-33)*2 + 255; *amp = 0; } /* mute all */ else { *dac = 0x00; *amp = 0x40; }}static void audiohw_mute(bool mute){ if (mute) { wmcodec_write(DACCTRL, DACCTRL_SOFTMUTE); } else { wmcodec_write(DACCTRL, DACCTRL_DACOSR128); }}void audiohw_preinit(void){ /* Set low bias mode */ wmcodec_write(BIASCTRL, BIASCTRL_BIASCUT); /* Enable HPCOM, LINECOM */ wmcodec_write(OUTCTRL, OUTCTRL_HP_COM | OUTCTRL_LINE_COM | OUTCTRL_TSOPCTRL | OUTCTRL_TSDEN | OUTCTRL_VROI); /* Mute all Outputs and set PGAs minimum gain */ wmcodec_write(LOUT1VOL, 0x140); wmcodec_write(ROUT1VOL, 0x140); wmcodec_write(LOUT2VOL, 0x140); wmcodec_write(ROUT2VOL, 0x140); wmcodec_write(OUT3MIX, 0x40); wmcodec_write(OUT4MIX, 0x40); /* Enable L/ROUT1 */ wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN); /* Enable VMID independent current bias */ wmcodec_write(OUT4TOADC, OUT4TOADC_POBCTRL); /* Enable required DACs and mixers */ wmcodec_write(PWRMGMT3, PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN | PWRMGMT3_DACENR | PWRMGMT3_DACENL); /* Enable VMIDSEL, BIASEN, BUFIOEN */ wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN | PWRMGMT1_BUFIOEN | PWRMGMT1_VMIDSEL_10K); /* Setup digital interface, input amplifiers, PLL, ADCs and DACs */ wmcodec_write(AINTFCE, AINTFCE_IWL_16BIT | AINTFCE_FORMAT_I2S); wmcodec_write(CLKCTRL, CLKCTRL_MS); /* WM8758 is clock master */ audiohw_set_frequency(HW_FREQ_44); wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX); wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX); /* Disable VMID independent current bias */ wmcodec_write(OUT4TOADC, 0); wmcodec_write(OUTCTRL, OUTCTRL_HP_COM_D | OUTCTRL_LINE_COM_D); wmcodec_write(THREEDCTRL, 0); wmcodec_write(DACLIMITER1, DACLIMITER1_LIMEN); wmcodec_write(DACLIMITER2, 0x3);}void audiohw_postinit(void){ wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN | PWRMGMT1_BUFIOEN | PWRMGMT1_VMIDSEL_500K); /* lower the VMID power consumption */ wmcodec_write(BIASCTRL, 0); audiohw_mute(false);}void audiohw_set_volume(int vol_l, int vol_r){ int dac_l, amp_l, dac_r, amp_r; vol_l = vol_tenthdb2hw(vol_l); vol_r = vol_tenthdb2hw(vol_r); get_volume_params(vol_l, &dac_l, &_l); get_volume_params(vol_r, &dac_r, &_r); /* set DAC Important: DAC is global and will also affect lineout */ wmcodec_write(LDACVOL, dac_l); wmcodec_write(RDACVOL, dac_r | RDACVOL_DACVU); /* set headphone amp OUT1 */ wmcodec_write(LOUT1VOL, amp_l | LOUT1VOL_LOUT1ZC); wmcodec_write(ROUT1VOL, amp_r | ROUT1VOL_ROUT1ZC | ROUT1VOL_OUT1VU);}void audiohw_set_lineout_volume(int vol_l, int vol_r){ int dac_l, amp_l, dac_r, amp_r; wmcodec_write(LOUT2VOL, LOUT2VOL_LOUT2MUTE); wmcodec_write(ROUT2VOL, ROUT2VOL_ROUT2MUTE); wmcodec_write(THREEDCTRL, 0);}void audiohw_enable_lineout(bool enable){ /* Initialize data without lineout enabling. */ int pwrmgmt3_data = PWRMGMT3_RMIXEN | PWRMGMT3_LMIXEN | PWRMGMT3_DACENR | PWRMGMT3_DACENL; /* Set lineout (OUT2), if enabled. */ if (enable) pwrmgmt3_data |= PWRMGMT3_LOUT2EN | PWRMGMT3_ROUT2EN; /* Set register. */ wmcodec_write(PWRMGMT3, pwrmgmt3_data); wmcodec_write(LOUT2VOL, LOUT2VOL_LOUT2MUTE); wmcodec_write(ROUT2VOL, ROUT2VOL_ROUT2MUTE); wmcodec_write(THREEDCTRL, 0);}void audiohw_set_bass(int value){ eq1_reg = (eq1_reg & ~EQ_GAIN_MASK) | EQ_GAIN_VALUE(value); wmcodec_write(EQ1, eq1_reg);}void audiohw_set_bass_cutoff(int value){ eq1_reg = (eq1_reg & ~EQ_CUTOFF_MASK) | EQ_CUTOFF_VALUE(value); wmcodec_write(EQ1, eq1_reg);}void audiohw_set_treble(int value){ eq5_reg = (eq5_reg & ~EQ_GAIN_MASK) | EQ_GAIN_VALUE(value); wmcodec_write(EQ5, eq5_reg);}void audiohw_set_treble_cutoff(int value){ eq5_reg = (eq5_reg & ~EQ_CUTOFF_MASK) | EQ_CUTOFF_VALUE(value); wmcodec_write(EQ5, eq5_reg);}/* Nice shutdown of WM8758 codec */void audiohw_close(void){ audiohw_mute(true); /* Disable Thermal shutdown */ wmcodec_write(OUTCTRL, OUTCTRL_HP_COM | OUTCTRL_VROI); /* Enable VMIDTOG */ wmcodec_write(OUT4TOADC, OUT4TOADC_VMIDTOG); /* Disable VMIDSEL and BUFIOEN */ wmcodec_write(PWRMGMT1, PWRMGMT1_PLLEN | PWRMGMT1_BIASEN | PWRMGMT1_VMIDSEL_OFF); /* Wait for VMID to discharge */ sleep(3*HZ/10); /* Power off registers */ wmcodec_write(PWRMGMT2, 0); wmcodec_write(PWRMGMT3, 0); wmcodec_write(PWRMGMT1, 0);}/* Note: Disable output before calling this function */void audiohw_set_frequency(int fsel){ /* CLKCTRL_MCLKDIV_MASK and ADDCTRL_SR_MASK don't overlap, so they can both fit in one byte. Bit 0 selects PLL configuration via pll_setups. */ static const unsigned char freq_setups[HW_NUM_FREQ] = { [HW_FREQ_48] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz | 1, [HW_FREQ_44] = CLKCTRL_MCLKDIV_2 | ADDCTRL_SR_48kHz, [HW_FREQ_32] = CLKCTRL_MCLKDIV_3 | ADDCTRL_SR_32kHz | 1, [HW_FREQ_24] = CLKCTRL_MCLKDIV_4 | ADDCTRL_SR_24kHz | 1, [HW_FREQ_22] = CLKCTRL_MCLKDIV_4 | ADDCTRL_SR_24kHz, [HW_FREQ_16] = CLKCTRL_MCLKDIV_6 | ADDCTRL_SR_16kHz | 1, [HW_FREQ_12] = CLKCTRL_MCLKDIV_8 | ADDCTRL_SR_12kHz | 1, [HW_FREQ_11] = CLKCTRL_MCLKDIV_8 | ADDCTRL_SR_12kHz, [HW_FREQ_8] = CLKCTRL_MCLKDIV_12 | ADDCTRL_SR_8kHz | 1 }; /* Each PLL configuration is an array consisting of { PLLN, PLLK1, PLLK2, PLLK3 }. The WM8983 datasheet requires 5 < PLLN < 13, and states optimum is PLLN = 8, f2 = 90 MHz */ static const unsigned short pll_setups[2][4] = { /* f1 = 12 MHz, R = 7.5264, f2 = 90.3168 MHz, fPLLOUT = 22.5792 MHz */ { PLLN_PLLPRESCALE | 0x7, 0x21, 0x161, 0x26 }, /* f1 = 12 MHz, R = 8.192, f2 = 98.304 MHz, fPLLOUT = 24.576 MHz */ { PLLN_PLLPRESCALE | 0x8, 0xC, 0x93, 0xE9 } }; int i; /* PLLN, PLLK1, PLLK2, PLLK3 are contiguous (at 0x24 to 0x27) */ for (i = 0; i < 4; i++) wmcodec_write(PLLN + i, pll_setups[freq_setups[fsel] & 1][i]); /* CLKCTRL_MCLKDIV divides fPLLOUT to get SYSCLK (256 * sample rate) */ wmcodec_write(CLKCTRL, CLKCTRL_CLKSEL | (freq_setups[fsel] & CLKCTRL_MCLKDIV_MASK) | CLKCTRL_BCLKDIV_2 | CLKCTRL_MS); /* set ADC and DAC filter characteristics according to sample rate */ wmcodec_write(ADDCTRL, (freq_setups[fsel] & ADDCTRL_SR_MASK) | ADDCTRL_SLOWCLKEN); /* SLOWCLK enabled for zero cross timeout to work */}void audiohw_enable_recording(bool source_mic){ (void)source_mic; /* We only have a line-in (I think) */ wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN | PWRMGMT2_INPGAENR | PWRMGMT2_INPGAENL | PWRMGMT2_ADCENR | PWRMGMT2_ADCENL); wmcodec_write(INCTRL, INCTRL_R2_2INPGA | INCTRL_L2_2INPGA); wmcodec_write(LADCBOOST, LADCBOOST_L2_2BOOST(5)); wmcodec_write(RADCBOOST, RADCBOOST_R2_2BOOST(5)); /* Enable monitoring */ wmcodec_write(LOUTMIX, LOUTMIX_BYP2LMIXVOL(5) | LOUTMIX_BYPL2LMIX | LOUTMIX_DACL2LMIX); wmcodec_write(ROUTMIX, ROUTMIX_BYP2RMIXVOL(5) | ROUTMIX_BYPR2RMIX | ROUTMIX_DACR2RMIX);}void audiohw_disable_recording(void){ wmcodec_write(LOUTMIX, LOUTMIX_DACL2LMIX); wmcodec_write(ROUTMIX, ROUTMIX_DACR2RMIX); wmcodec_write(PWRMGMT2, PWRMGMT2_ROUT1EN | PWRMGMT2_LOUT1EN);}/* volume in 0 .. 63, corresponds to -12dB .. +35.25dB in 0.75dB steps */void audiohw_set_recvol(int left, int right, int type){ switch (type) { case AUDIO_GAIN_MIC: right = left; /* fall through */ case AUDIO_GAIN_LINEIN: wmcodec_write(LINPGAVOL, LINPGAVOL_INPGAZCL | (left & LINPGAVOL_INPGAVOL_MASK)); wmcodec_write(RINPGAVOL, RINPGAVOL_INPGAVU | RINPGAVOL_INPGAZCR | (right & RINPGAVOL_INPGAVOL_MASK)); break; default: return; }}void audiohw_set_monitor(bool enable){ (void)enable;}
/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * $Id$ * * Copyright (C) 2005 by Dave Chapman * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/#ifndef _WM8758_H#define _WM8758_H#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | BASS_CUTOFF_CAP | \ TREBLE_CUTOFF_CAP | LINEOUT_CAP | LIN_GAIN_CAP | \ MIC_GAIN_CAP)AUDIOHW_SETTING(VOLUME, "dB", 0, 1, -90, 6, -25)AUDIOHW_SETTING(BASS, "dB", 0, 1, -12, 12, 0)AUDIOHW_SETTING(TREBLE, "dB", 0, 1, -12, 12, 0)AUDIOHW_SETTING(BASS_CUTOFF, "", 0, 1, 1, 4, 1)AUDIOHW_SETTING(TREBLE_CUTOFF, "", 0, 1, 1, 4, 1)#ifdef HAVE_RECORDING/* The input PGAs have a gain range from -12dB to +35.25dB in 0.75dB steps * Values: 0, 1, ..., 63 * => -12dB, -11.25dB, ..., 35.25dB */AUDIOHW_SETTING(LEFT_GAIN, "dB", 1, 1, 0, 63, 16, ((val) * 15) / 2 - 120)AUDIOHW_SETTING(RIGHT_GAIN, "dB", 1, 1, 0, 63, 16, ((val) * 15) / 2 - 120)AUDIOHW_SETTING(MIC_GAIN, "dB", 1, 1, 0, 63, 16, ((val) * 15) / 2 - 120)#endif /* HAVE_RECORDING */void audiohw_enable_lineout(bool enable);#define RESET 0x00#define RESET_RESET 0x0#define PWRMGMT1 0x01 /* default 000 */#define PWRMGMT1_VMIDSEL_OFF (0 << 0)#define PWRMGMT1_VMIDSEL_100K (1 << 0)#define PWRMGMT1_VMIDSEL_500K (2 << 0)#define PWRMGMT1_VMIDSEL_10K (3 << 0)#define PWRMGMT1_BUFIOEN (1 << 2)#define PWRMGMT1_BIASEN (1 << 3)#define PWRMGMT1_MICBEN (1 << 4)#define PWRMGMT1_PLLEN (1 << 5)#define PWRMGMT1_OUT3MIXEN (1 << 6)#define PWRMGMT1_OUT4MIXEN (1 << 7)#define PWRMGMT2 0x02 /* default 000 */#define PWRMGMT2_ADCENL (1 << 0)#define PWRMGMT2_ADCENR (1 << 1)#define PWRMGMT2_INPGAENL (1 << 2)#define PWRMGMT2_INPGAENR (1 << 3)#define PWRMGMT2_BOOSTENL (1 << 4)#define PWRMGMT2_BOOSTENR (1 << 5)#define PWRMGMT2_SLEEP (1 << 6)#define PWRMGMT2_LOUT1EN (1 << 7)#define PWRMGMT2_ROUT1EN (1 << 8)#define PWRMGMT3 0x03 /* default 000 */#define PWRMGMT3_DACENL (1 << 0)#define PWRMGMT3_DACENR (1 << 1)#define PWRMGMT3_LMIXEN (1 << 2)#define PWRMGMT3_RMIXEN (1 << 3)#define PWRMGMT3_ROUT2EN (1 << 5)#define PWRMGMT3_LOUT2EN (1 << 6)#define PWRMGMT3_OUT3EN (1 << 7)#define PWRMGMT3_OUT4EN (1 << 8)#define AINTFCE 0x04 /* default 050 */#define AINTFCE_MONO (1 << 0)#define AINTFCE_ALRSWAP (1 << 1)#define AINTFCE_DLRSWAP (1 << 2)#define AINTFCE_FORMAT_MSB_RJUST (0 << 3)#define AINTFCE_FORMAT_MSB_LJUST (1 << 3)#define AINTFCE_FORMAT_I2S (2 << 3) /* default */#define AINTFCE_FORMAT_DSP (3 << 3)#define AINTFCE_FORMAT_MASK (3 << 3)#define AINTFCE_IWL_16BIT (0 << 5)#define AINTFCE_IWL_20BIT (1 << 5)#define AINTFCE_IWL_24BIT (2 << 5) /* default */#define AINTFCE_IWL_32BIT (3 << 5)#define AINTFCE_IWL_MASK (3 << 5)#define AINTFCE_LRP (1 << 7)#define AINTFCE_BCP (1 << 8)#define COMPCTRL 0x05 /* default 000 unused */#define CLKCTRL 0x06 /* default 140 */#define CLKCTRL_MS (1 << 0)#define CLKCTRL_BCLKDIV_1 (0 << 2)#define CLKCTRL_BCLKDIV_2 (1 << 2)#define CLKCTRL_BCLKDIV_4 (2 << 2)#define CLKCTRL_BCLKDIV_8 (3 << 2)#define CLKCTRL_BCLKDIV_16 (4 << 2)#define CLKCTRL_BCLKDIV_32 (5 << 2)#define CLKCTRL_MCLKDIV_1 (0 << 5)#define CLKCTRL_MCLKDIV_1_5 (1 << 5)#define CLKCTRL_MCLKDIV_2 (2 << 5) /* default */#define CLKCTRL_MCLKDIV_3 (3 << 5)#define CLKCTRL_MCLKDIV_4 (4 << 5)#define CLKCTRL_MCLKDIV_6 (5 << 5)#define CLKCTRL_MCLKDIV_8 (6 << 5)#define CLKCTRL_MCLKDIV_12 (7 << 5)#define CLKCTRL_MCLKDIV_MASK (7 << 5)#define CLKCTRL_CLKSEL (1 << 8) /* default */#define ADDCTRL 0x07 /* default 000 */#define ADDCTRL_SLOWCLKEN (1 << 0)#define ADDCTRL_SR_48kHz (0 << 1)#define ADDCTRL_SR_32kHz (1 << 1)#define ADDCTRL_SR_24kHz (2 << 1)#define ADDCTRL_SR_16kHz (3 << 1)#define ADDCTRL_SR_12kHz (4 << 1)#define ADDCTRL_SR_8kHz (5 << 1)#define ADDCTRL_SR_MASK (7 << 1)#define ADDCTRL_M128ENB (1 << 8)#define GPIOCTRL 0x08 /* default 000 unused */#define JACKDETECTCTRL1 0x09 /* default 000 unused */#define DACCTRL 0x0a /* default 000 */#define DACCTRL_DACLPOL (1 << 0)#define DACCTRL_DACRPOL (1 << 1)#define DACCTRL_AMUTE (1 << 2)#define DACCTRL_DACOSR128 (1 << 3)#define DACCTRL_SOFTMUTE (1 << 6)#define LDACVOL 0x0b /* default 0ff */#define LDACVOL_MASK 0xff#define LDACVOL_DACVU (1 << 8)#define RDACVOL 0x0c /* default 0ff */#define RDACVOL_MASK 0xff#define RDACVOL_DACVU (1 << 8)#define JACKDETECTCTRL2 0x0d /* default 000 unused */#define ADCCTRL 0x0e /* default 100 */#define ADCCTRL_ADCLPOL (1 << 0)#define ADCCTRL_ADCRPOL (1 << 1)#define ADCCTRL_ADCOSR128 (1 << 3)#define ADCCTRL_HPFCUT_MASK (7 << 4)#define ADCCTRL_HPFAPP (1 << 7)#define ADCCTRL_HPFEN (1 << 8) /* default */#define LADCVOL 0x0f /* default 0ff */#define LADCVOL_MASK 0xff#define LADCVOL_ADCVU (1 << 8)#define RADCVOL 0x10 /* default 0ff */#define RADCVOL_MASK 0xff#define RADCVOL_ADCVU (1 << 8)#define EQ1 0x12 /* default 12c */#define EQ2 0x13 /* default 02c */#define EQ3 0x14 /* default 02c */#define EQ4 0x15 /* default 02c */#define EQ5 0x16 /* default 02c *//* note: WM8758 curruently runs on low power mode. 3 peaking filters * and 3D will work when M128ENB is enabled + proper code. */#define EQ1_EQ3DMODE (1 << 8) /* default */#define EQ_GAIN_MASK 0x1f#define EQ_CUTOFF_MASK (3 << 5)#define EQ_GAIN_VALUE(x) (((-x) + 12) & 0x1f)#define EQ_CUTOFF_VALUE(x) ((((x) - 1) & 0x03) << 5)#define DACLIMITER1 0x18 /* default 032 unused */#define DACLIMITER1_LIMEN (0 << 8)#define DACLIMITER2 0x19 /* default 000 unused */#define NOTCHFILTER1 0x1b /* default 000 unused */#define NOTCHFILTER2 0x1c /* default 000 unused */#define NOTCHFILTER3 0x1d /* default 000 unused */#define NOTCHFILTER4 0x1e /* default 000 unused */#define ALCCONTROL1 0x20 /* default 038 unused */#define ALCCONTROL2 0x21 /* default 00b unused */#define ALCCONTROL3 0x22 /* default 032 unused */#define NOISEGATE 0x23 /* default 000 unused */#define PLLN 0x24 /* default 008 */#define PLLN_PLLN_MASK 0x0f#define PLLN_PLLPRESCALE (1 << 4)#define PLLK1 0x25 /* default 00c */#define PLLK1_MASK 0x3f#define PLLK2 0x26 /* default 093 */#define PLLK3 0x27 /* default 0e9 */#define THREEDCTRL 0x29 /* default 000 */#define THREEDCTRL_DEPTH3D_MASK 0x0f#define OUT4TOADC 0x2a /* default 000 */#define OUT4TOADC_OUT1DEL (1 << 0)#define OUT4TOADC_DELEN (1 << 1)#define OUT4TOADC_POBCTRL (1 << 2)#define OUT4TOADC_OUT2DEL (1 << 3)#define OUT4TOADC_VMIDTOG (1 << 4)#define OUT4TOADC_OUT4_2LNR (1 << 5)#define OUT4TOADC_OUT4_ADCVOL_MASK (7 << 6)#define BEEPCTRL 0x2b /* default 000 */#define BEEPCTRL_DELEN2 (1 << 2)#define BEEPCTRL_BYPR2LMIX (1 << 7)#define BEEPCTRL_BYPL2RMIX (1 << 8)#define INCTRL 0x2c /* default 003 */#define INCTRL_LIP2INPGA (1 << 0) /* default */#define INCTRL_LIN2INPGA (1 << 1) /* default */#define INCTRL_L2_2INPGA (1 << 2)#define INCTRL_RIP2INPGA (1 << 4)#define INCTRL_RIN2INPGA (1 << 5)#define INCTRL_R2_2INPGA (1 << 6)#define INCTRL_MBVSEL (1 << 8)#define LINPGAVOL 0x2d /* default 010 */#define LINPGAVOL_INPGAVOL_MASK 0x3f#define LINPGAVOL_INPGAMUTEL (1 << 6)#define LINPGAVOL_INPGAZCL (1 << 7)#define LINPGAVOL_INPGAVU (1 << 8)#define RINPGAVOL 0x2e /* default 010 */#define RINPGAVOL_INPGAVOL_MASK 0x3f#define RINPGAVOL_INPGAMUTER (1 << 6)#define RINPGAVOL_INPGAZCR (1 << 7)#define RINPGAVOL_INPGAVU (1 << 8)#define LADCBOOST 0x2f /* default 100 */#define LADCBOOST_L2_2BOOST_MASK (7 << 4)#define LADCBOOST_L2_2BOOST(x) ((x) << 4)#define LADCBOOST_PGABOOSTL (1 << 8) /* default */#define RADCBOOST 0x30 /* default 100 */#define RADCBOOST_R2_2BOOST_MASK (7 << 4)#define RADCBOOST_R2_2BOOST(x) ((x) << 4)#define RADCBOOST_PGABOOSTR (1 << 8) /* default */#define OUTCTRL 0x31 /* default 002 */#define OUTCTRL_VROI (1 << 0)#define OUTCTRL_TSDEN (1 << 1) /* default */#define OUTCTRL_TSOPCTRL (1 << 2)#define OUTCTRL_OUT3ENDEL (1 << 3)#define OUTCTRL_OUT4ENDEL (1 << 4)#define OUTCTRL_DACR2LMIX (1 << 5)#define OUTCTRL_DACL2RMIX (1 << 6)#define OUTCTRL_LINE_COM (1 << 7)#define OUTCTRL_LINE_COM_D (0 << 7)#define OUTCTRL_HP_COM (1 << 8)#define OUTCTRL_HP_COM_D (0 << 8)#define LOUTMIX 0x32 /* default 001 */#define LOUTMIX_DACL2LMIX (1 << 0) /* default */#define LOUTMIX_BYPL2LMIX (1 << 1)#define LOUTMIX_BYP2LMIXVOL_MASK (7 << 2)#define LOUTMIX_BYP2LMIXVOL(x) ((x) << 2)#define ROUTMIX 0x33 /* default 001 */#define ROUTMIX_DACR2RMIX (1 << 0) /* default */#define ROUTMIX_BYPR2RMIX (1 << 1)#define ROUTMIX_BYP2RMIXVOL_MASK (7 << 2)#define ROUTMIX_BYP2RMIXVOL(x) ((x) << 2)#define LOUT1VOL 0x34 /* default 039 */#define LOUT1VOL_MASK 0x3f#define LOUT1VOL_LOUT1MUTE (1 << 6)#define LOUT1VOL_LOUT1ZC (1 << 7)#define LOUT1VOL_OUT1VU (1 << 8)#define ROUT1VOL 0x35 /* default 039 */#define ROUT1VOL_MASK 0x3f#define ROUT1VOL_ROUT1MUTE (1 << 6)#define ROUT1VOL_ROUT1ZC (1 << 7)#define ROUT1VOL_OUT1VU (1 << 8)#define LOUT2VOL 0x36 /* default 039 */#define LOUT2VOL_MASK 0x3f#define LOUT2VOL_LOUT2MUTE (1 << 6)#define LOUT2VOL_LOUT2ZC (1 << 7)#define LOUT2VOL_OUT2VU (1 << 8)#define ROUT2VOL 0x37 /* default 039 */#define ROUT2VOL_MASK 0x3f#define ROUT2VOL_ROUT2MUTE (1 << 6)#define ROUT2VOL_ROUT2ZC (1 << 7)#define ROUT2VOL_OUT2VU (1 << 8)#define OUT3MIX 0x38 /* default 001 */#define OUT3MIX_LDAC2OUT3 (1 << 0) /* default */#define OUT3MIX_LMIX2OUT3 (1 << 1)#define OUT3MIX_BYPL2OUT3 (1 << 2)#define OUT3MIX_OUT4_2OUT3 (1 << 3)#define OUT3MIX_OUT3MUTE (1 << 6)#define OUT4MIX 0x39 /* default 001 */#define OUT4MIX_RDAC2OUT4 (1 << 0) /* default */#define OUT4MIX_RMIX2OUT4 (1 << 1)#define OUT4MIX_BYPR2OUT4 (1 << 2)#define OUT4MIX_LDAC2OUT4 (1 << 3)#define OUT4MIX_LMIX2OUT4 (1 << 4)#define OUT4MIX_OUT4ATTN (1 << 5)#define OUT4MIX_OUT4MUTE (1 << 6)#define OUT4MIX_OUT3_2OUT4 (1 << 7)#define BIASCTRL 0x3d /* default 000 */#define BIASCTRL_HALFOPBIAS (1 << 0)#define BIASCTRL_HALFI_IPGA (1 << 6)#define BIASCTRL_BIASCUT (1 << 8)/* Dummy definition, to be removed when the audio driver API gets reworked. */#define WM8758_44100HZ 0#endif /* _WM8758_H */
#define DACLIMITER1_LIMEN (0 << 8) // Set LIMEN = 0 - disables DAC limiter so I can apply digital gain in DAC.#define OUTCTRL_LINE_COM_D (0 << 7) // Sets LINE_COM to VMID.#define OUTCTRL_HP_COM_D (0 << 8) // Sets HP_COM to VMID
void audiohw_preinit(void)............................................... wmcodec_write(OUTCTRL, OUTCTRL_HP_COM_D | OUTCTRL_LINE_COM_D); //sets HP_COM/LINE_COM to VMID wmcodec_write(THREEDCTRL, 0); //make sure it disables 3D depth effect for saving extra current usage + not clipping wmcodec_write(DACLIMITER1, DACLIMITER1_LIMEN); //disables DAC limiter (so I can boost DAC gain) wmcodec_write(DACLIMITER2, 0); //enables DAC gain (0 - +12db)...............................................
void audiohw_set_lineout_volume............................................... wmcodec_write(LOUT2VOL, LOUT2VOL_LOUT2MUTE); //Sets Lout2 to VMID wmcodec_write(ROUT2VOL, ROUT2VOL_ROUT2MUTE); //Sets Rout2 to VMID wmcodec_write(THREEDCTRL, 0); //disables 3D depth effect (just to be sure)...............................................//removed this bit of code from original file: vol_l = vol_tenthdb2hw(vol_l); //removed setting of volume for R/Lout2 as it goes VMID. vol_r = vol_tenthdb2hw(vol_r); get_volume_params(vol_l, &dac_l, &_l); get_volume_params(vol_r, &dac_r, &_r); wmcodec_write(LOUT2VOL, amp_l | LOUT2VOL_LOUT2ZC); wmcodec_write(ROUT2VOL, amp_r | ROUT2VOL_ROUT2ZC | ROUT2VOL_OUT2VU);...............................................
void audiohw_enable_lineout............................................... wmcodec_write(LOUT2VOL, LOUT2VOL_LOUT2MUTE); //Set R/Lout2 to VMID in the "Enable Linout" option wmcodec_write(ROUT2VOL, ROUT2VOL_ROUT2MUTE); wmcodec_write(THREEDCTRL, 0); //I'm anal about this setting.
wmcodec_write(LOUT2VOL, LOUT2VOL_LOUT2MUTE); //Set R/Lout2 to VMID in the "Enable Linout" option wmcodec_write(ROUT2VOL, ROUT2VOL_ROUT2MUTE); wmcodec_write(THREEDCTRL, 0); //I'm anal about this setting.
I'd also measure the common voltage to see if it is really being set half way between AVDD and ground.
/* Codec voltage supply. ECO not allowed as max. current of 5mA is not * sufficient. Defaults: * iPod Video = 0xf5 = 3.0V ON * iPod nano = 0xef = 2.4V ON */ pcf50605_write(PCF5060X_D1REGC1, 0xf0); /* 2.5V ON */
This is free so should be set to 3V (0xf5) for max sound quality, which could be an option for those who have large batteries and care for sound quality.
But at those stock levels, the values are expressed directly in the datasheet. No need to measure anything. The gain in volume/quality is real, and quantified in the datasheet. I
Hi! I was interested to do a capless mod for video 5.5G ipod, but found myself completely noob in compiling firmware with modded driver.... Re-routing all connections on PCB isn't a problem. Can anyone share a latest beta firmware file with capless modified driver + 3.0V or 3.3V mod on DAC chip (as i am using huge slim battery with iflash micro-sd adapter). Thanks!
Page created in 0.05 seconds with 21 queries.